)]}'
{
  "commit": "ea3b1b4db229584aad17704c87015e1623b9cb17",
  "tree": "10cd6cce461642335402ac657f45f1f2b8748e02",
  "parents": [
    "cd446f4b93ae647023a701ce92c9653a9efdea15"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Sat Feb 13 23:41:01 2010 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Sat Feb 13 23:41:01 2010 +0000"
  },
  "message": "Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from Nvidia\n\nHuge thanks to Michael Karcher for reverse engineering the MCP67 chipset\nand writing a spec. Due to this, we were able to use the chinese wall\ntechnique for 100% clean room reverse engineering.\n\nThis patch doesn\u0027t touch any of the new registers, it only reads them.\nAssuming that read has no side effects, this patch is a no-op and safe.\n\nWe need \"flashrom -V\" output from all post-MCP55 (nForce 5) chipset\nboards. Please indicate if your board uses SPI flash or LPC flash (if\nyou know it). Note: That output is only helpful if it is created with\npatched flashrom and if is from the first run of flashrom after a cold\nboot (reset or Ctrl-Alt-Del is not sufficient). There is a pattern based\non which we can probably detect which flash type is present on the\nboard.\n\nThanks to Alessandro Polverini for testing earlier iterations of this\npatch.\n\nNote: The MCP67 should work. I guessed that the other recent Nvidia\nchipsets would work in a similar way, and created a simplified\ndo-nothing catchall chipset enable function which dumps some info and\ninstructs the user to send more info.\n\nCorresponding to flashrom svn r902.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Michael Karcher \u003cflashrom@mkarcher.dialup.fu-berlin.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "50e62b15f3380379b4a9c53454f4c2b66534a9d6",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "bb3fd7b74fb9dd172f36bcf82894eecd312efcce",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}
