chipset_enable: Mark Intel CM236 and CM246 as DEP
The usual ME-lock limitations apply, so this is DEP instead of OK.
Tested on Kontron/bSL6 (SKL) and Siemens/Field PG M6 (CFL) and also
regression tested on Apollo Lake. Flashrom works fine, and logs and
descriptor dumps look good. Also, register and descriptor output
agree on the flash layout and permissions.
Change-Id: I40db4773f127bec63e377e1d2ab402b47edf9a61
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
diff --git a/chipset_enable.c b/chipset_enable.c
index 1636f7c..f02ba87 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2009,7 +2009,7 @@
{0x8086, 0xa14b, B_S, NT, "Intel", "Sunrise Point Server Sample", enable_flash_pch100},
{0x8086, 0xa14d, B_S, NT, "Intel", "QM170", enable_flash_pch100},
{0x8086, 0xa14e, B_S, NT, "Intel", "HM170", enable_flash_pch100},
- {0x8086, 0xa150, B_S, NT, "Intel", "CM236", enable_flash_pch100},
+ {0x8086, 0xa150, B_S, DEP, "Intel", "CM236", enable_flash_pch100},
{0x8086, 0xa151, B_S, NT, "Intel", "QMS180", enable_flash_pch100},
{0x8086, 0xa152, B_S, NT, "Intel", "HM175", enable_flash_pch100},
{0x8086, 0xa153, B_S, NT, "Intel", "QM175", enable_flash_pch100},
@@ -2045,7 +2045,7 @@
{0x8086, 0xa30a, B_S, NT, "Intel", "C242", enable_flash_pch300},
{0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300},
{0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300},
- {0x8086, 0xa30e, B_S, NT, "Intel", "CM246", enable_flash_pch300},
+ {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300},
#endif
{0},
};