diff --git a/chipset_enable.c b/chipset_enable.c
index 8fdabdc..94de693 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -781,15 +781,15 @@
 
 static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
 {
-    uint8_t tmp;
+	uint8_t tmp;
 
-    pci_write_byte(dev, 0x92, 0);
+	pci_write_byte(dev, 0x92, 0);
 
-    tmp = pci_read_byte(dev, 0x6d);
-    tmp |= 0x01;
-    pci_write_byte(dev, 0x6d, tmp);
+	tmp = pci_read_byte(dev, 0x6d);
+	tmp |= 0x01;
+	pci_write_byte(dev, 0x6d, tmp);
 
-    return 0;
+	return 0;
 }
 
 static int enable_flash_ck804(struct pci_dev *dev, const char *name)
diff --git a/dummyflasher.c b/dummyflasher.c
index ba3c633..f64691d 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -66,7 +66,7 @@
 	if (buses_supported == CHIP_BUSTYPE_NONE)
 		printf_debug("Support for all flash bus types disabled.\n");
 	free(dummytype);
-	return 0; 
+	return 0;
 }
 
 int dummy_shutdown(void)
diff --git a/flash.h b/flash.h
index 14a9145..2a71761 100644
--- a/flash.h
+++ b/flash.h
@@ -346,8 +346,8 @@
 #define EN_29F040A		0x7F04
 #define EN_29LV010		0x7F6E
 #define EN_29LV040A		0x7F4F	/* EN_29LV040(A) */
-#define EN_29F002T		0x7F92
-#define EN_29F002B		0x7F97
+#define EN_29F002T		0x7F92	/* Also EN29F002A */
+#define EN_29F002B		0x7F97	/* Also EN29F002AN */
 
 #define FUJITSU_ID		0x04	/* Fujitsu */
 #define MBM29F400BC		0xAB
diff --git a/flashrom.8 b/flashrom.8
index 7a52725..406e5b0 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -133,7 +133,7 @@
 .sp
 .BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
 .sp
-.BR "* it87spi" " (for flash ROMs behind a IT87xx SuperI/O LPC/SPI translation unit)"
+.BR "* it87spi" " (for flash ROMs behind an ITE IT87xx Super I/O LPC/SPI translation unit)"
 .sp
 The dummy programmer has an optional parameter specifying the bus types it
 should support. For that you have to use the
diff --git a/nic3com.c b/nic3com.c
index 0bebe92..81b4f9e 100644
--- a/nic3com.c
+++ b/nic3com.c
@@ -46,7 +46,7 @@
 	{0x10b7, 0x9006, PCI_NT, "3COM", "3C90xB: PCI 10BASE-T/10BASE2 (TPC)" },
 	{0x10b7, 0x900a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FL" },
 	{0x10b7, 0x905a, PCI_NT, "3COM", "3C90xB: PCI 10BASE-FX" },
-	{0x10b7, 0x9058, PCI_NT, "3COM", "3C905B: Cyclone 10/100/BNC" },
+	{0x10b7, 0x9058, PCI_OK, "3COM", "3C905B: Cyclone 10/100/BNC" },
 
 	/* 3C905C */
 	{0x10b7, 0x9200, PCI_OK, "3COM", "3C905C: EtherLink 10/100 PCI (TX)" },