)]}'
{
  "commit": "e604d56cf5654db8b744cbe5fb4fdb5fbfecd4e8",
  "tree": "997104c21770b3a847d438004873691b39aea898",
  "parents": [
    "019810f3fd083df5f6f61d19dda2d252709d02fe"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Jan 29 17:34:57 2023 +0000"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Tue Feb 21 22:52:42 2023 +0000"
  },
  "message": "chipset_enable: Split detection for AMD Merlin Falcon and Stoney\n\nSplit the chipset enable entries because future SoCs use the same\nPCI IDs. We use the SMBus device for this, just like `sb600spi`.\nHowever, as the latter expects the LPC device to be passed, we\nhave to look that up first.\n\nChange-Id: Iba02d8695d150f9be51c996932b845a487b0e4ce\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72574\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0d796db142c7d5f5a0ea70f5cc448fcd6fb33215",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "0e8fafa078de341dc3f9fa7e996002a7dd4421bc",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}