diff --git a/nicintel.c b/nicintel.c
index 1d9a2a7..af5689e 100644
--- a/nicintel.c
+++ b/nicintel.c
@@ -16,7 +16,6 @@
 /* Datasheet: http://download.intel.com/design/network/datashts/82559_Fast_Ethernet_Multifunction_PCI_Cardbus_Controller_Datasheet.pdf */
 
 #include <stdlib.h>
-#include "flash.h"
 #include "programmer.h"
 #include "hwaccess_physmap.h"
 #include "platform/pci.h"
@@ -41,10 +40,8 @@
 
 #define CSR_FCR 0x0c
 
-static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
-				 chipaddr addr);
-static uint8_t nicintel_chip_readb(const struct flashctx *flash,
-				   const chipaddr addr);
+static void nicintel_chip_writeb(const struct par_master *, uint8_t val, chipaddr);
+static uint8_t nicintel_chip_readb(const struct par_master *, chipaddr);
 static const struct par_master par_master_nicintel = {
 	.chip_readb	= nicintel_chip_readb,
 	.chip_readw	= fallback_chip_readw,
@@ -96,14 +93,12 @@
 	return register_par_master(&par_master_nicintel, BUS_PARALLEL, 0, NICINTEL_MEMMAP_SIZE, NULL);
 }
 
-static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
-				 chipaddr addr)
+static void nicintel_chip_writeb(const struct par_master *par, uint8_t val, chipaddr addr)
 {
 	pci_mmio_writeb(val, nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }
 
-static uint8_t nicintel_chip_readb(const struct flashctx *flash,
-				   const chipaddr addr)
+static uint8_t nicintel_chip_readb(const struct par_master *par, const chipaddr addr)
 {
 	return pci_mmio_readb(nicintel_bar + (addr & NICINTEL_MEMMAP_MASK));
 }