)]}'
{
  "commit": "dd59220e7e774d3e8fa100cd0b448fa363e3be73",
  "tree": "6d7c8fb007bf977a011c3b4b63bb906f5872b677",
  "parents": [
    "71b706f544eff68657a15139c39b9f0d8c3b2940"
  ],
  "author": {
    "name": "Alan Green",
    "email": "avg@google.com",
    "time": "Fri Aug 23 10:11:37 2019 +1000"
  },
  "committer": {
    "name": "Edward O\u0027Callaghan",
    "email": "quasisec@chromium.org",
    "time": "Tue Sep 17 06:29:13 2019 +0000"
  },
  "message": "flashchips.c: Put SFDP-capable chip back into position\n\nPut entry for Unknown SFDP-capable chip back into place at end of file.\n\nChange 1f9cc7d89992114c70f7a0545ad9f98701bebe56 \"flashchips.c: Sort file\nby vendor and model\" reordered many entries in flashchips.c, including\nthis one. However, the entry for Unknown, SFDP-capable chip should not\nhave been moved before any specific chip entries.\n\nAs reported by Angel Pons \u003cth3fanbus@gmail.com\u003e at\nhttps://review.coreboot.org/c/flashrom/+/33931:\n\n\"\"\"\nOops, this introduced a bug: the SFDP entry is no longer at the end of\nflashchips.c, so probing on a SFDP-capable Winbond chip results in added\nnoise (flashrom says things about an unknown chip, and then has two\ndefinitions for the same chip).\n\"\"\"\n\nSigned-off-by: Alan Green \u003cavg@google.com\u003e\nChange-Id: I5955020456dbcd5e7db280a459b668a743e464dc\nReviewed-on: https://review.coreboot.org/c/flashrom/+/35037\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c6f95172af40a312432fb326e3187132a7a14251",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "9b686c1bd7525d3f6da59bf350628c8f67ba9d53",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    }
  ]
}