Add board enable for ASUS OPLX-M
The vendor enable does some other funky stuff with MTRRs/MSRs, SMIs,
cache and legacy ISA address forward twiddling. I would only use
this patch to read and verify the existing contents, just to be safe.
The PCI IDs of the onboard devices do contain no subsystem IDs at all.
Probing and reading was
Tested-by: Ville Skyttä <ville.skytta@iki.fi>
See http://www.flashrom.org/pipermail/flashrom/2010-October/005256.html
Corresponding to flashrom svn r1501.
Signed-off-by: Joshua Roys <roysjosh@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
diff --git a/board_enable.c b/board_enable.c
index d4f14bb..d9e26bc 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1240,6 +1240,7 @@
/*
* Suited for:
+ * - ASUS OPLX-M
* - ASUS P2B-N
*/
static int intel_piix4_gpo18_lower(void)
@@ -2144,6 +2145,7 @@
{0x10DE, 0x0264, 0x1043, 0x81C0, 0x10DE, 0x0260, 0x1043, 0x81C0, NULL, NULL, NULL, P3, "ASUS", "M2NBP-VM CSM", 0, OK, nvidia_mcp_gpio0_raise},
{0x1106, 0x1336, 0x1043, 0x80ed, 0x1106, 0x3288, 0x1043, 0x8249, NULL, NULL, NULL, P3, "ASUS", "M2V-MX", 0, OK, via_vt823x_gpio5_raise},
{0x8086, 0x24cc, 0, 0, 0x8086, 0x24c3, 0x1043, 0x1869, "^M6Ne$", NULL, NULL, P3, "ASUS", "M6Ne", 0, NT, intel_ich_gpio43_raise},
+ {0x8086, 0x7180, 0, 0, 0x8086, 0x7110, 0, 0, "^OPLX-M$", NULL, NULL, P3, "ASUS", "OPLX-M", 0, NT, intel_piix4_gpo18_lower},
{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^P2B-N$", NULL, NULL, P3, "ASUS", "P2B-N", 0, OK, intel_piix4_gpo18_lower},
{0x8086, 0x1A30, 0x1043, 0x8025, 0x8086, 0x244B, 0x104D, 0x80F0, NULL, NULL, NULL, P3, "ASUS", "P4B266-LM", 0, OK, intel_ich_gpio21_raise},
{0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, NULL, P3, "ASUS", "P4B266", 0, OK, intel_ich_gpio22_raise},