commit d152fb95e2b7fda62a85f6c8e4112ba9f353a8d6
author Nico Huber <nico.huber@secunet.com> Mon Jun 19 12:57:10 2017 +0200
committer Nico Huber <nico.h@gmx.de> Thu Jul 13 16:27:55 2017 +0000
tree cfd2ea28b75cb90db72f488ee237a068d0cb52a4
parent 731316a9128c4015bc0facd1743afeb3a080129e

Drop redundant `enum msglevel`

Use `enum flashrom_log_level` instead to avoid further confusion.

Change-Id: I1895cb8f60da3abf70c9c2953f52414cd2cc10a9
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20268
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

ichspi.c

diff --git a/ichspi.c b/ichspi.c
index 218e3b1..be13f91 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1738,7 +1738,7 @@
 			tmp = mmio_readl(ich_spibar + ICH8_REG_VSCC);
 			msg_pdbg("0xC1: 0x%08x (VSCC)\n", tmp);
 			msg_pdbg("VSCC: ");
-			prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, true);
+			prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, true);
 		} else {
 			if (ich_generation != CHIPSET_BAYTRAIL && desc_valid) {
 				ichspi_bbar = mmio_readl(ich_spibar + ICH9_REG_BBAR);
@@ -1751,12 +1751,12 @@
 				tmp = mmio_readl(ich_spibar + ICH9_REG_LVSCC);
 				msg_pdbg("0xC4: 0x%08x (LVSCC)\n", tmp);
 				msg_pdbg("LVSCC: ");
-				prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, true);
+				prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, true);
 
 				tmp = mmio_readl(ich_spibar + ICH9_REG_UVSCC);
 				msg_pdbg("0xC8: 0x%08x (UVSCC)\n", tmp);
 				msg_pdbg("UVSCC: ");
-				prettyprint_ich_reg_vscc(tmp, MSG_DEBUG, false);
+				prettyprint_ich_reg_vscc(tmp, FLASHROM_MSG_DEBUG, false);
 
 				tmp = mmio_readl(ich_spibar + ICH9_REG_FPB);
 				msg_pdbg("0xD0: 0x%08x (FPB)\n", tmp);