flashchips: Comment successful probing w/ lower size
These LPC chips use only the 15 LSBs of the address, when decoding
commands. Tests confirmed that they react to probing, with offsets
for sizes from 64KiB to 512KiB.
The upper limit is always the same as the chip's size, as they de-
code up to 32 bits when deciding if the chip is addressed. This is
different from designs with parallel chips, where the chip is only
aware of address bits within its own size limits and reacts to an
external chip select signal.
Change-Id: I748d692b9151e672e27a7ef0070efd54dacc68d5
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/527
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/flashchips.c b/flashchips.c
index 9ae3c04..6987de8 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -20139,7 +20139,7 @@
.id.model = SST_SST49LF040B,
.total_size = 512,
.page_size = 64 * 1024,
- .feature_bits = FEATURE_EITHER_RESET,
+ .feature_bits = FEATURE_EITHER_RESET, /* probing from 64KiB to 512KiB works */
.tested = TEST_OK_PREW,
.probe_timing = 1, /* 150ns */
.block_erasers =
@@ -25288,7 +25288,7 @@
.id.model = WINBOND_W39V040B,
.total_size = 512,
.page_size = 64 * 1024,
- .feature_bits = FEATURE_EITHER_RESET,
+ .feature_bits = FEATURE_EITHER_RESET, /* probing from 64KiB to 512KiB works */
.tested = TEST_OK_PREW,
.probe_timing = 10,
.block_erasers =