diff --git a/board_enable.c b/board_enable.c
index cee9ec5..e0075a0 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -993,26 +993,6 @@
 
 /*
  * Suited for:
- *  - Shuttle FN25 (SN25P): AMD S939 + NVIDIA CK804 (nForce4)
- */
-static int board_shuttle_fn25(void)
-{
-	struct pci_dev *dev;
-
-	dev = pci_dev_find(0x10DE, 0x0050);	/* NVIDIA CK804 ISA bridge. */
-	if (!dev) {
-		msg_perr("\nERROR: NVIDIA nForce4 ISA bridge not found.\n");
-		return -1;
-	}
-
-	/* One of those bits seems to be connected to TBL#, but -ENOINFO. */
-	pci_write_byte(dev, 0x92, 0);
-
-	return 0;
-}
-
-/*
- * Suited for:
  * - Elitegroup GeForce6100SM-M: NVIDIA MCP61 + ITE IT8726F
  */
 static int board_ecs_geforce6100sm_m(void)
@@ -2339,7 +2319,6 @@
 	{0x8086, 0x27A0, 0x1043, 0x1287,  0x8086, 0x27DF, 0x1043, 0x1287, "^A8J",       NULL, NULL,           P3, "ASUS",        "A8Jm",                  0,   NT, intel_ich_gpio34_raise},
 	{0x10DE, 0x0260, 0x103C, 0x2A34,  0x10DE, 0x0264, 0x103C, 0x2A34, "NODUSM3",    NULL, NULL,           P3, "ASUS",        "A8M2N-LA (NodusM3-GL8E)",  0,   OK, nvidia_mcp_gpio0_raise},
 	{0x10DE, 0x0260, 0x103c, 0x2a3e,  0x10DE, 0x0264, 0x103c, 0x2a3e, "NAGAMI2L",   NULL, NULL,           P3, "ASUS",        "A8N-LA (Nagami-GL8E)",  0,   OK, nvidia_mcp_gpio0_raise},
-	{0x10DE, 0x005E, 0x1043, 0x815A,  0x10DE, 0x0054, 0x1043, 0x815A, "^A8N-SLI DELUXE", NULL, NULL,      P3, "ASUS",        "A8N-SLI Deluxe",        0,   NT, board_shuttle_fn25},
 	{0x10de, 0x0264, 0x1043, 0x81bc,  0x10de, 0x02f0, 0x1043, 0x81cd, NULL,         NULL, NULL,           P3, "ASUS",        "A8N-VM CSM",            0,   OK, w83627ehf_gpio22_raise_2e},
 	{0x10DE, 0x0264, 0x1043, 0x81C0,  0x10DE, 0x0260, 0x1043, 0x81C0, NULL,         NULL, NULL,           P3, "ASUS",        "M2NBP-VM CSM",          0,   OK, nvidia_mcp_gpio0_raise},
 	{0x1106, 0x1336, 0x1043, 0x80ed,  0x1106, 0x3288, 0x1043, 0x8249, NULL,         NULL, NULL,           P3, "ASUS",        "M2V-MX",                0,   OK, via_vt823x_gpio5_raise},
@@ -2433,7 +2412,6 @@
 	{0x8086, 0x24d3, 0x144d, 0xb025,  0x8086, 0x1050, 0x144d, 0xb025, NULL,         NULL, NULL,           P3, "Samsung",     "Polaris 32",            0,   OK, intel_ich_gpio21_raise},
 	{0x1106, 0x3099,      0,      0,  0x1106, 0x3074,      0,      0, NULL,         "shuttle", "ak31",    P3, "Shuttle",     "AK31",                  0,   OK, w836xx_memw_enable_2e},
 	{0x1106, 0x3104, 0x1297, 0xa238,  0x1106, 0x3059, 0x1297, 0xc063, NULL,         NULL, NULL,           P3, "Shuttle",     "AK38N",                 256, OK, NULL},
-	{0x10DE, 0x0050, 0x1297, 0x5036,  0x1412, 0x1724, 0x1297, 0x5036, NULL,         NULL, NULL,           P3, "Shuttle",     "FN25",                  0,   OK, board_shuttle_fn25},
 	{0x1106, 0x3038, 0x0925, 0x1234,  0x1106, 0x3058, 0x15DD, 0x7609, NULL,         NULL, NULL,           P3, "Soyo",        "SY-7VCA",               0,   OK, via_apollo_gpo0_lower},
 	{0x10de, 0x0364, 0x108e, 0x6676,  0x10de, 0x0369, 0x108e, 0x6676, "^Sun Ultra 40 M2", NULL, NULL,     P3, "Sun",         "Ultra 40 M2",           0,   OK, board_sun_ultra_40_m2},
 	{0x1106, 0x3038, 0x0925, 0x1234,  0x1106, 0x0596, 0x1106,      0, NULL,         NULL, NULL,           P3, "Tekram",      "P6Pro-A5",              256, OK, NULL},
diff --git a/chipset_enable.c b/chipset_enable.c
index 2e4a5fc..e1684f9 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -997,25 +997,74 @@
 
 static int enable_flash_ck804(struct pci_dev *dev, const char *name)
 {
-	uint8_t old, new;
+	uint32_t segctrl;
+	uint8_t reg, old, new;
+	unsigned int err = 0;
 
-	pci_write_byte(dev, 0x92, 0x00);
-	if (pci_read_byte(dev, 0x92) != 0x00) {
-		msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
-			  "(WARNING ONLY).\n", 0x92, 0x00, name);
+	/* 0x8A is special: it is a single byte and only one nibble is touched. */
+	reg = 0x8A;
+	segctrl = pci_read_byte(dev, reg);
+	if ((segctrl & 0x3) != 0x0) {
+		if ((segctrl & 0xC) != 0x0) {
+			msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg);
+			err++;
+		} else {
+			msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
+			rpci_write_byte(dev, reg, segctrl & 0xF0);
+
+			segctrl = pci_read_byte(dev, reg);
+			if ((segctrl & 0x3) != 0x0) {
+				msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%x).\n",
+					  reg, segctrl);
+				err++;
+			} else
+				msg_pdbg("OK\n");
+		}
 	}
 
-	old = pci_read_byte(dev, 0x88);
-	new = old | 0xc0;
+	for (reg = 0x8C; reg <= 0x94; reg += 4) {
+		segctrl = pci_read_long(dev, reg);
+		if ((segctrl & 0x33333333) == 0x00000000) {
+			/* reads and writes are unlocked */
+			continue;
+		}
+		if ((segctrl & 0xCCCCCCCC) != 0x00000000) {
+			msg_pinfo("Can not unlock existing protection in register 0x%02x.\n", reg);
+			err++;
+			continue;
+		}
+		msg_pdbg("Unlocking protection in register 0x%02x... ", reg);
+		rpci_write_long(dev, reg, 0x00000000);
+
+		segctrl = pci_read_long(dev, reg);
+		if ((segctrl & 0x33333333) != 0x00000000) {
+			msg_pinfo("Could not unlock protection in register 0x%02x (new value: 0x%08x).\n",
+				  reg, segctrl);
+			err++;
+		} else
+			msg_pdbg("OK\n");
+	}
+
+	if (err > 0) {
+		msg_pinfo("%d locks could not be disabled, disabling writes (reads may also fail).\n", err);
+		programmer_may_write = 0;
+	}
+
+	reg = 0x88;
+	old = pci_read_byte(dev, reg);
+	new = old | 0xC0;
 	if (new != old) {
-		rpci_write_byte(dev, 0x88, new);
-		if (pci_read_byte(dev, 0x88) != new) {
-			msg_pinfo("Setting register 0x%x to 0x%x on %s failed "
-				  "(WARNING ONLY).\n", 0x88, new, name);
+		rpci_write_byte(dev, reg, new);
+		if (pci_read_byte(dev, reg) != new) {
+			msg_pinfo("Setting register 0x%02x to 0x%x on %s failed.\n", reg, new, name);
+			err++;
 		}
 	}
 
 	if (enable_flash_nvidia_common(dev, name))
+		err++;
+
+	if (err > 0)
 		return ERROR_NONFATAL;
 	else
 		return 0;
diff --git a/print.c b/print.c
index ae067a6..582a49e 100644
--- a/print.c
+++ b/print.c
@@ -620,7 +620,7 @@
 	B("ASUS",	"A8N-E",		OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NE/", NULL),
 	B("ASUS",	"A8N-LA (Nagami-GL8E)",	OK, "http://h10025.www1.hp.com/ewfrf/wc/document?lc=en&cc=us&docname=c00647121&dlc=en", "This is an OEM board from HP, the HP name is Nagami-GL8E."),
 	B("ASUS",	"A8N-SLI",		OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI/", NULL),
-	B("ASUS",	"A8N-SLI Deluxe",	NT, NULL, "Untested board enable."),
+	B("ASUS",	"A8N-SLI Deluxe",	NT, NULL, "Should work out of the box since r1593."),
 	B("ASUS",	"A8N-SLI Premium",	OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NSLI_Premium/", NULL),
 	B("ASUS",	"A8N-VM",		OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM/", NULL),
 	B("ASUS",	"A8N-VM CSM",		OK, "http://www.asus.com/Motherboards/AMD_Socket_939/A8NVM_CSM/", NULL),