)]}'
{
  "commit": "c6e8b1ad88ed1c65bba9c6002a36b16181c1ffec",
  "tree": "a96474c1ccdee8b8fcb54bf36894f639016979c2",
  "parents": [
    "39687acc6bf41b955a11e8a8fa3f0029342cbb3e"
  ],
  "author": {
    "name": "Sergii Dmytruk",
    "email": "sergii.dmytruk@3mdeb.com",
    "time": "Sun Aug 14 20:57:48 2022 +0300"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Dec 30 01:16:56 2022 +0100"
  },
  "message": "flashchips.c: enable WP for EN25QH32 and EN25QH64\n\nSplit chips:\n * EN25QH32 -\u003e EN25QH32 and EN25QH32B\n * EN25QH64 -\u003e EN25QH64 and EN25QH64A\n\nUnlike older revisions both newly added EN25QH32B and EN25QH64A support\nhalf block (32KiB) erase operation via 0x52 opcode.\n\nChange-Id: I759f0119346235ce0bddc78cde9c461495990c25\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66213\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71009\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6d7a7457026363a6ae9d21116d539326f85d1476",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "65a2c462025d53f9131641c6fadea080026c49a6",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    }
  ]
}