diff --git a/board_enable.c b/board_enable.c
index b5a5442..5876036 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -67,7 +67,7 @@
 }
 
 /* Winbond W83697 documentation indicates that the index register has to be written for each access. */
-void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
+static void sio_mask_alzheimer(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask)
 {
 	uint8_t tmp;
 
@@ -519,7 +519,7 @@
  * Supported chips:
  * W83697HF/F/HG, W83697SF/UF/UG
  */
-void w83697xx_memw_enable(uint16_t port)
+static void w83697xx_memw_enable(uint16_t port)
 {
 	w836xx_ext_enter(port);
 	if (!(sio_read(port, 0x24) & 0x02)) { /* Flash ROM enabled? */
diff --git a/dmi.c b/dmi.c
index c32a8da..ae90f7c 100644
--- a/dmi.c
+++ b/dmi.c
@@ -250,7 +250,7 @@
 	return 0;
 }
 
-int dmi_fill(void)
+static int dmi_fill(void)
 {
 	size_t fp;
 	uint8_t *dmi_mem;
@@ -344,7 +344,7 @@
 	return result;
 }
 
-int dmi_fill(void)
+static int dmi_fill(void)
 {
 	int i;
 	char *chassis_type;
diff --git a/edi.c b/edi.c
index 2afd032..bd5b269 100644
--- a/edi.c
+++ b/edi.c
@@ -457,7 +457,7 @@
 	return 0;
 }
 
-int edi_shutdown(void *data)
+static int edi_shutdown(void *data)
 {
 	struct flashctx *flash;
 	int rc;
diff --git a/flashrom.c b/flashrom.c
index b47d0a2..5b85c14 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -738,8 +738,7 @@
 }
 
 /* start is an offset to the base address of the flash chip */
-int check_erased_range(struct flashctx *flash, unsigned int start,
-		       unsigned int len)
+static int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
 {
 	int ret;
 	uint8_t *cmpbuf = malloc(len);
@@ -2055,7 +2054,7 @@
 	}
 }
 
-void print_sysinfo(void)
+static void print_sysinfo(void)
 {
 #if IS_WINDOWS
 	SYSTEM_INFO si;
@@ -2235,8 +2234,8 @@
 /* FIXME: This function signature needs to be improved once doit() has a better
  * function signature.
  */
-int chip_safety_check(const struct flashctx *flash, int force, int read_it, int write_it, int erase_it,
-		      int verify_it)
+static int chip_safety_check(const struct flashctx *flash, int force,
+			     int read_it, int write_it, int erase_it, int verify_it)
 {
 	const struct flashchip *chip = flash->chip;
 
diff --git a/hwaccess.c b/hwaccess.c
index acb99f8..bb5aac4 100644
--- a/hwaccess.c
+++ b/hwaccess.c
@@ -223,7 +223,7 @@
 	};
 };
 
-int undo_mmio_write(void *p)
+static int undo_mmio_write(void *p)
 {
 	struct undo_mmio_write_data *data = p;
 	msg_pdbg("Restoring MMIO space at %p\n", data->addr);
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 0a4cf75..bfe92bb 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -442,7 +442,7 @@
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
+static void prettyprint_ich_descriptor_straps_ich8(const struct ich_descriptors *desc)
 {
 	static const char * const str_GPIO12[4] = {
 		"GPIO12",
@@ -504,7 +504,7 @@
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_pchstraps45678_56(const struct ich_desc_south_strap *s)
 {
 	/* PCHSTRP4 */
 	msg_pdbg2("Intel PHY is %s.\n",
@@ -528,7 +528,7 @@
 	/* PCHSTRP8 */
 }
 
-void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_pchstraps111213_56(const struct ich_desc_south_strap *s)
 {
 	/* PCHSTRP11 */
 	msg_pdbg2("SMLink1 GP Address is %sabled.\n",
@@ -544,7 +544,7 @@
 	/* PCHSTRP13 */
 }
 
-void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_straps_ibex(const struct ich_desc_south_strap *s)
 {
 	static const uint8_t dec_t209min[4] = {
 		100,
@@ -642,7 +642,7 @@
 	msg_pdbg2("\n");
 }
 
-void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
+static void prettyprint_ich_descriptor_straps_cougar(const struct ich_desc_south_strap *s)
 {
 	msg_pdbg2("--- PCH ---\n");
 
@@ -811,7 +811,7 @@
 	}
 }
 
-void prettyprint_rdid(uint32_t reg_val)
+static void prettyprint_rdid(uint32_t reg_val)
 {
 	uint8_t mid = reg_val & 0xFF;
 	uint16_t did = ((reg_val >> 16) & 0xFF) | (reg_val & 0xFF00);
diff --git a/it85spi.c b/it85spi.c
index e47cabb..1d1ecad 100644
--- a/it85spi.c
+++ b/it85spi.c
@@ -106,7 +106,7 @@
 
 /* IT8502 employs a scratch RAM when flash is being updated. Call the following
  * two functions before/after flash erase/program. */
-void it85xx_enter_scratch_rom(void)
+static void it85xx_enter_scratch_rom(void)
 {
 	int ret, tries;
 
@@ -163,7 +163,7 @@
 	}
 }
 
-void it85xx_exit_scratch_rom(void)
+static void it85xx_exit_scratch_rom(void)
 {
 #if 0
 	int ret;
diff --git a/it87spi.c b/it87spi.c
index 13b3aae..9e7a8ea 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -57,7 +57,7 @@
 	sio_write(port, 0x02, 0x02);
 }
 
-uint16_t probe_id_ite(uint16_t port)
+static uint16_t probe_id_ite(uint16_t port)
 {
 	uint16_t id;
 
diff --git a/pcidev.c b/pcidev.c
index f5ad819..54c1fd3 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -266,7 +266,7 @@
 	};
 };
 
-int undo_pci_write(void *p)
+static int undo_pci_write(void *p)
 {
 	struct undo_pci_write_data *data = p;
 	if (pacc == NULL || data->dev == NULL) {
diff --git a/physmap.c b/physmap.c
index 8e80925..ad38ad3 100644
--- a/physmap.c
+++ b/physmap.c
@@ -97,7 +97,7 @@
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	__dpmi_meminfo mi;
 
@@ -126,7 +126,7 @@
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 }
 #elif defined(__MACH__) && defined(__APPLE__)
@@ -147,7 +147,7 @@
 #define sys_physmap_rw_uncached	sys_physmap
 #define sys_physmap_ro_cached	sys_physmap
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	unmap_physical(virt_addr, len);
 }
@@ -200,7 +200,7 @@
 	return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr;
 }
 
-void sys_physunmap_unaligned(void *virt_addr, size_t len)
+static void sys_physunmap_unaligned(void *virt_addr, size_t len)
 {
 	munmap(virt_addr, len);
 }
diff --git a/print.c b/print.c
index 7eb5485..cfe6267 100644
--- a/print.c
+++ b/print.c
@@ -423,7 +423,7 @@
 }
 #endif
 
-void print_supported_devs(const struct programmer_entry prog, const char *const type)
+static void print_supported_devs(const struct programmer_entry prog, const char *const type)
 {
 	const struct dev_entry *const devs = prog.devs.dev;
 	msg_ginfo("\nSupported %s devices for the %s programmer:\n", type, prog.name);
diff --git a/spi25.c b/spi25.c
index 611cd72..ecb1893 100644
--- a/spi25.c
+++ b/spi25.c
@@ -455,19 +455,19 @@
 	return result ? result : status;
 }
 
-int spi_chip_erase_60(struct flashctx *flash)
+static int spi_chip_erase_60(struct flashctx *flash)
 {
 	/* This usually takes 1-85s, so wait in 1s steps. */
 	return spi_simple_write_cmd(flash, 0x60, 1000 * 1000);
 }
 
-int spi_chip_erase_62(struct flashctx *flash)
+static int spi_chip_erase_62(struct flashctx *flash)
 {
 	/* This usually takes 2-5s, so wait in 100ms steps. */
 	return spi_simple_write_cmd(flash, 0x62, 100 * 1000);
 }
 
-int spi_chip_erase_c7(struct flashctx *flash)
+static int spi_chip_erase_c7(struct flashctx *flash)
 {
 	/* This usually takes 1-85s, so wait in 1s steps. */
 	return spi_simple_write_cmd(flash, 0xc7, 1000 * 1000);
diff --git a/usbblaster_spi.c b/usbblaster_spi.c
index fa984e5..f9d72c2 100644
--- a/usbblaster_spi.c
+++ b/usbblaster_spi.c
@@ -67,7 +67,7 @@
 
 /* The programmer shifts bits in the wrong order for SPI, so we use this method to reverse the bits when needed.
  * http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */
-uint8_t reverse(uint8_t b)
+static uint8_t reverse(uint8_t b)
 {
 	return ((b * 0x0802LU & 0x22110LU) | (b * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16;
 }