)]}'
{
  "commit": "bbccdb275537493ec252362fc5fb792a879ae3d7",
  "tree": "3666bfc60d97ba51abcaa3c6c7d62be23c449cdc",
  "parents": [
    "58cf5197a6f89fd146ce0fbc340d67ef7cbe191c"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sat May 28 16:48:26 2022 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jan 05 16:35:01 2023 +0000"
  },
  "message": "spi25_statusreg: Allow WRSR_EXT for Status Register 3 (dummy part)\n\nSpansion flash chips S25FL128L and S25FL256L use the WRSR instruction to\nwrite more than 2 registers. So align SR2 and SR3 support: The current\nFEATURE_WRSR_EXT is renamed to FEATURE_WRSR_EXT2 and FEATURE_WRSR_EXT3\nis added. Also, WRSR3 needs a separate flag now.\n\nVerified that FEATURE_WRSR_EXT2 still works using the `dummy_flasher`.\n\nflashrom-stable:\nOriginal patch was split, this is the `dummy_flasher.c` part.\n\nChange-Id: I81153cb758b9fc29b803959683ad7acf8fb771e4\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nOriginal-Change-Id: Ibdfc6eb3d2cfecbf8da0493d067031ddb079a094\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/64746\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nOriginal-Reviewed-by: Thomas Heijligen \u003csrc@posteo.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71463\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "768ec8979dc2dc62933c11036a522b55d502239d",
      "old_mode": 33188,
      "old_path": "dummyflasher.c",
      "new_id": "27b212efc2fe84226887de574571314819fed025",
      "new_mode": 33188,
      "new_path": "dummyflasher.c"
    }
  ]
}