)]}'
{
  "commit": "b5433b782ff7cbde14ebd91aeac27efaec83e9d0",
  "tree": "facd5500f80682ce09fe7135362df5f4e7a87609",
  "parents": [
    "3eae69531936cc41f227a532efea4cc3598d0f68"
  ],
  "author": {
    "name": "Johanna Schander",
    "email": "git@mimoja.de",
    "time": "Sun Dec 29 15:16:14 2019 +0100"
  },
  "committer": {
    "name": "David Hendricks",
    "email": "david.hendricks@gmail.com",
    "time": "Sun Feb 09 06:00:51 2020 +0000"
  },
  "message": "chipset_enable.c: Add Ice Lake U to known and tested systems\n\nIntel Ice Lake systems use an 495 Series Chipset\nthat behaves compatible to pch300 chips but chip names\nare undocumented at this point.\n\nThis change was tested in read/write/erase on the Razer\nBlade Stealth (late 2019) with intel 1065G7 CPU and\n\"Ice Lake U Premium PCH\".\n\nChange-Id: I6227d32f4476420cf1aeec37ebd4b7648e0b3d15\nSigned-off-by: Johanna Schander \u003cgit@mimoja.de\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/37987\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Christoph Pomaska \u003cgithub@slrie.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "3b44d9307de750438cb1c0ad3c88b64a4bb720c6",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "84e4b6b5c6f210add57e654cb64eb51ed810dec4",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}