)]}'
{
  "commit": "b09136b0971913cf7f984355c1005f65575aba44",
  "tree": "c11416105bf9ff3bb8a8a8b2a1ade79f9e63278c",
  "parents": [
    "ed8b82c17e285de43437325fe7c402186719da8c"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Oct 25 22:52:30 2024 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Feb 23 12:05:52 2025 +0000"
  },
  "message": "flashchips: Add Puya P25Q05..16H 3.3V parts\n\nAll quad-i/o chips with block-protection similar to Winbond. One\nspecialty is a page-erase operation.  At the upper end (P25Q08H,\nP25Q16H), they have a configuration register that is read like a\nthird status register however written like a second (31h, accor-\nding to the datasheets).\n\nDatasheets used:\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q40H_20H_10H_05H_Datasheet_V2.0.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q80H_Datasheet_V1.7.pdf\nhttps://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/P25Q16H_Datasheet_V2.1.pdf\n\nChange-Id: I8ca43d19603cd11fd9cf06d2afc930b1096548d3\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/291\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e077c69e27b7742df0d811f9b11affd120e1b986",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "50743cfb0b5902a69a6be3b17b57e7ceaa067c36",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    },
    {
      "type": "modify",
      "old_id": "03798bf5513735bcc9a0fad1c4a73d4eb6adc46d",
      "old_mode": 33188,
      "old_path": "include/flashchips.h",
      "new_id": "d80404e8bb124b62683282e895e360b5247e3300",
      "new_mode": 33188,
      "new_path": "include/flashchips.h"
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}