diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index bcbb943..9390f92 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -760,7 +760,7 @@
 .B model
 can be
 .BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, " stk200 " for the Atmel \
-STK200/300, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)."
+STK200/300, " wiggler " for the Macraigor Wiggler, or " xilinx " for the Xilinx Parallel Cable III (DLC 5)."
 .sp
 More information about the RayeR hardware is available at
 .nh
@@ -768,6 +768,9 @@
 The Altera ByteBlasterMV datasheet can be obtained from
 .nh
 .BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " .
+For more information about the Macraigor Wiggler see
+.nh
+.BR "http://www.macraigor.com/wiggler.htm " .
 The schematic of the Xilinx DLC 5 was published in
 .nh
 .BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " .
diff --git a/rayer_spi.c b/rayer_spi.c
index 23503cb..f8dff95 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -94,11 +94,19 @@
 	.shutdown = stk200_shutdown,
 };
 
+static const struct rayer_pinout wiggler_lpt = {
+	.cs_bit = 1,
+	.sck_bit = 2,
+	.mosi_bit = 3,
+	.miso_bit = 7,
+};
+
 static const struct rayer_programmer rayer_spi_types[] = {
 	{"rayer",		NT,	"RayeR SPIPGM",					&rayer_spipgm},
 	{"xilinx",		NT,	"Xilinx Parallel Cable III (DLC 5)",		&xilinx_dlc5},
 	{"byteblastermv",	OK,	"Altera ByteBlasterMV",				&altera_byteblastermv},
 	{"stk200",		NT,	"Atmel STK200/300 adapter",			&atmel_stk200},
+	{"wiggler",		OK,	"Wiggler LPT",					&wiggler_lpt},
 	{0},
 };