)]}'
{
  "commit": "a9424d597de410b07e34c47d7c0613f0595d5d9a",
  "tree": "16fc9db04f7ed29f19e454d979e9cc79216addc3",
  "parents": [
    "325b5d47d81fb4434e722abac9600396da394218"
  ],
  "author": {
    "name": "Stefan Reinauer",
    "email": "stepan@coresystems.de",
    "time": "Fri Jun 27 16:28:34 2008 +0000"
  },
  "committer": {
    "name": "Stefan Reinauer",
    "email": "stefan.reinauer@coreboot.org",
    "time": "Fri Jun 27 16:28:34 2008 +0000"
  },
  "message": "Multiple unrelated changes\n\n* ICH7 SPI support\n* fix some variable names in ichspi.c (Offset -\u003e offset)\n* Dump ICH7 SPI bar with -V\n* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)\n\nCorresponding to flashrom svn r278 and coreboot v2 svn r3393.\n\nSigned-off-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\nAcked-by: Peter Stuge \u003cpeter@stuge.se\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0e45f6e0cda849d16b66802ac421e90b30d14c2a",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "d1ab9643096f3f93ec26bb4b9c3e1e0d2568d1e4",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    },
    {
      "type": "modify",
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      "old_path": "flash.h",
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      "new_mode": 33188,
      "new_path": "flash.h"
    },
    {
      "type": "modify",
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      "old_path": "flashrom.c",
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      "new_path": "flashrom.c"
    },
    {
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      "old_path": "ichspi.c",
      "new_id": "d6c0157e138cb2da89b8654a8dad5eb625dcc4a0",
      "new_mode": 33188,
      "new_path": "ichspi.c"
    },
    {
      "type": "modify",
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      "old_path": "spi.c",
      "new_id": "1de02a4d6df8d9842a8760e4047129421d5bf1e1",
      "new_mode": 33188,
      "new_path": "spi.c"
    }
  ]
}