Move Intel SPI initialisation to ichspi.c
Smarter version could decide whether SPI is vital or not depending on
straps. Straps are currently implemented for ICH7. EP80579 is in the comment,
PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI".
Corresponding to flashrom svn r1098.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
diff --git a/flash.h b/flash.h
index ca3f6f5..1cf333a 100644
--- a/flash.h
+++ b/flash.h
@@ -607,6 +607,9 @@
#define OK 0
#define NT 1 /* Not tested */
+/* Something happened that shouldn't happen, but we can go on */
+#define ERROR_NONFATAL 0x100
+
/* cli_output.c */
/* Let gcc and clang check for correct printf-style format strings. */
int print(int type, const char *fmt, ...) __attribute__((format(printf, 2, 3)));
@@ -694,10 +697,10 @@
uint32_t spi_get_valid_read_addr(void);
/* ichspi.c */
-extern int ichspi_lock;
extern uint32_t ichspi_bbar;
-extern void *ich_spibar;
-int ich_init_opcodes(void);
+int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
+ int ich_generation);
+int via_init_spi(struct pci_dev *dev);
int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);