tree 65fca18733796e382116eae9d3945a8c0a01cdf5
parent 5eb7a58c1bc34f64c43f98578ce5b9be21a3f152
author Nico Huber <nico.h@gmx.de> 1724581784 +0200
committer Nico Huber <nico.h@gmx.de> 1731247085 +0000

chipset_enable: Factor PCH100 hidden-spidev workaround out

Intel mandates that the SPI PCI device,  usually 00:1f.5, is hidden
on all 22nm PCHs. This applies to the whole 100 and 200 series PCHs
as well as some special 300 and 400 series PCHs, and the respective
server PCHs and small-core SoCs.

To cope with the hidden PCI device, we match the LPC PCI device and
then crudely assume that the SPI device exists too (only its vendor
and device IDs are hidden). We don't need this workaround for newer
generations where the PCI device isn't hidden anymore,  hence split
it out.

Tested read on Alder Lake P, read/erase/write on CM246 (Cannon Point).

Change-Id: I77b5240b99015ecf56773f4a34436cfd3c83bdf6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/249