)]}'
{
  "commit": "9f0641960c4b3a4d71d5876b12e9c1e354bec139",
  "tree": "8149dd59cba3645b9ea66faae3f2f1168f10f6b3",
  "parents": [
    "5c639b32004925ae89ac6eb654344bad21cea9ef"
  ],
  "author": {
    "name": "Luka Kovacic",
    "email": "luka.kovacic@sartura.hr",
    "time": "Thu Jul 30 13:31:15 2020 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jan 05 16:07:04 2023 +0000"
  },
  "message": "chipset_enable.c: Add support for Intel C620 Series Chipset SPI Controller\n\nSupport for the Intel C620 Series Chipset SPI Controller (rev 04) is added\nto enable SPI flash access on the following platform:\n\n- Intel Xeon D-2187NT\n\nSupport for this controller was shortly tested on the platform above.\nThe flash is recognized, some regions of the flash are locked.\n\nSigned-off-by: Luka Kovacic \u003cluka.kovacic@sartura.hr\u003e\nOriginal-Tested-by: Jakov Petrina \u003cjakov.petrina@sartura.hr\u003e\nCc: Luka Perkov \u003cluka.perkov@sartura.hr\u003e\nChange-Id: If39d9bb1acd4029f802a44a2940dd23f66ba09b1\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/44162\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71318\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d3ae61f720055b46645c6bcb0b20b7efce6e4aa7",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "e014d21c269342f9d8d405db8fc6e6f5d4e42b86",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}