tree b742b7c1631b89e1cfa18a5553fc3da57ed2b8df
parent 0167522794a2e66f00248347122c1bb8ce3b001d
author Nikolai Artemiev <nartemiev@google.com> 1634729545 +1100
committer Nico Huber <nico.h@gmx.de> 1672359404 +0100

spi25_statusreg,flashchips: add SR2 read/write support

This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.

Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.

Tested: flashrom -{r,w,E}
Tested: flashrom --wp-{enable,disable,range,list,status} at end of patch series
Tested: logged SR2 read/write values during wp commands

Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/58570
Original-Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/70965
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>