buspirate: Add psus option
This change adds a 'psus=<on|off>' option, to control the external Vcc
state of the bus pirate, allowing hardware where the SPI flash chip is
powered by the 3V3/5V lines directly.
Change-Id: I8a7d4b40c0f7f04f6976f6757f05b61f2c9958f9
Signed-off-by: Jeremy Kerr <jk@codeconstruct.com.au>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54887
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71389
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/buspirate_spi.c b/buspirate_spi.c
index ae939e3..39b9c52 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -228,6 +228,7 @@
int serialspeed_index = -1;
int ret = 0;
int pullup = 0;
+ int psu = 0;
dev = extract_programmer_param("dev");
if (dev && !strlen(dev)) {
@@ -277,6 +278,17 @@
}
free(tmp);
+ tmp = extract_programmer_param("psus");
+ if (tmp) {
+ if (strcasecmp("on", tmp) == 0)
+ psu = 1;
+ else if (strcasecmp("off", tmp) == 0)
+ ; // ignore
+ else
+ msg_perr("Invalid psus state, not enabling.\n");
+ }
+ free(tmp);
+
/* Default buffer size is 19: 16 bytes data, 3 bytes control. */
#define DEFAULT_BUFSIZE (16 + 3)
bp_commbuf = malloc(DEFAULT_BUFSIZE);
@@ -527,6 +539,10 @@
bp_commbuf[0] |= (1 << 2);
msg_pdbg("Enabling pull-up resistors.\n");
}
+ if (psu == 1) {
+ bp_commbuf[0] |= (1 << 3);
+ msg_pdbg("Enabling PSUs.\n");
+ }
ret = buspirate_sendrecv(bp_commbuf, 1, 1);
if (ret) {
ret = 1;