chipset_enable: Mark AMD Pinnacle/Raven Ridge and Matisse as DEP
Tested Pinnacle Ridge and Raven Ridge on an ASRock A320M-HDV and
Matisse on an ASRock A520M-HDV. Because there can be access pro-
tections set up in the chipset, mark them as DEP.
Change-Id: Id389786d2b2dcea0141322c94ac72e03161019db
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73157
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/chipset_enable.c b/chipset_enable.c
index 8210a9c..1a1f508 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -1807,8 +1807,8 @@
{0x1022, 0x790b, REV(0x4a), B_FLS, OK, "AMD", "Merlin Falcon", enable_flash_sb600_smbus},
{0x1022, 0x790b, REV(0x4b), B_FLS, OK, "AMD", "Stoney Ridge", enable_flash_sb600_smbus},
{0x1022, 0x790b, REV(0x51), B_FLS, NT, "AMD", "Renoir/Cezanne", enable_flash_amd_spi100},
- {0x1022, 0x790b, REV(0x59), B_FLS, NT, "AMD", "Pinnacle Ridge", enable_flash_amd_spi100},
- {0x1022, 0x790b, REV(0x61), B_FLS, NT, "AMD", "Raven Ridge/Matisse/Starship", enable_flash_amd_spi100},
+ {0x1022, 0x790b, REV(0x59), B_FLS, DEP, "AMD", "Pinnacle Ridge", enable_flash_amd_spi100},
+ {0x1022, 0x790b, REV(0x61), B_FLS, DEP, "AMD", "Raven Ridge/Matisse/Starship", enable_flash_amd_spi100},
{0x1022, 0x790b, REV(0x71), B_FLS, NT, "AMD", "Mendocino", enable_flash_amd_spi100},
{0x1039, 0x0406, ANY_REV, B_PFL, NT, "SiS", "501/5101/5501", enable_flash_sis501},
{0x1039, 0x0496, ANY_REV, B_PFL, NT, "SiS", "85C496+497", enable_flash_sis85c496},