)]}'
{
  "commit": "96930c39524225cc55a5625e6e45d7519b3f2528",
  "tree": "40368d966ea3689aa4c8c2b020984671cc45d1d9",
  "parents": [
    "03adbe12691d512c0d9f28caa93cb35e468fd5d3"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Sat May 09 02:30:21 2009 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Sat May 09 02:30:21 2009 +0000"
  },
  "message": "Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode\n\nChange SPI architecture to handle 1-byte chunk chip writing differently\nfrom 256-byte chunk chip writing.\n\nAnnotate SPI chip write functions with _256 or _1 suffix denoting the\nnumber of bytes they write at maximum.\n\nThe 1-byte chunk writing is cut-n-pasted to different SPI drivers right\nnow. A later patch can move them to the generic spi_chip_write_1.\n\nCorresponding to flashrom svn r485.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "flash.h",
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      "new_mode": 33188,
      "new_path": "flash.h"
    },
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      "old_mode": 33188,
      "old_path": "ichspi.c",
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      "new_mode": 33188,
      "new_path": "ichspi.c"
    },
    {
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      "new_mode": 33188,
      "new_path": "it87spi.c"
    },
    {
      "type": "modify",
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      "new_path": "sb600spi.c"
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    },
    {
      "type": "modify",
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      "old_mode": 33188,
      "old_path": "wbsio_spi.c",
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}