diff --git a/chipset_enable.c b/chipset_enable.c
index 7f0edca..7dcadc5 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -42,7 +42,7 @@
 #include "hwaccess_x86_io.h"
 #include "hwaccess_x86_msr.h"
 
-static int enable_flash_ali_m1533(struct pci_dev *dev, const char *name)
+static int enable_flash_ali_m1533(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 
@@ -57,7 +57,7 @@
 	return 0;
 }
 
-static int enable_flash_rdc_r8610(struct pci_dev *dev, const char *name)
+static int enable_flash_rdc_r8610(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 
@@ -83,7 +83,7 @@
 	return 0;
 }
 
-static int enable_flash_sis85c496(struct pci_dev *dev, const char *name)
+static int enable_flash_sis85c496(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 
@@ -133,7 +133,7 @@
 	return sbdev;
 }
 
-static int enable_flash_sis501(struct pci_dev *dev, const char *name)
+static int enable_flash_sis501(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 	int ret = 0;
@@ -158,7 +158,7 @@
 	return ret;
 }
 
-static int enable_flash_sis5511(struct pci_dev *dev, const char *name)
+static int enable_flash_sis5511(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 	int ret = 0;
@@ -205,12 +205,12 @@
 	return ret;
 }
 
-static int enable_flash_sis530(struct pci_dev *dev, const char *name)
+static int enable_flash_sis530(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_sis5x0(dev, name, 0x20, 0x04);
 }
 
-static int enable_flash_sis540(struct pci_dev *dev, const char *name)
+static int enable_flash_sis540(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_sis5x0(dev, name, 0x80, 0x40);
 }
@@ -221,7 +221,7 @@
  *   - PDF: http://www.intel.com/design/intarch/datashts/29056201.pdf
  *   - Order Number: 290562-001
  */
-static int enable_flash_piix4(struct pci_dev *dev, const char *name)
+static int enable_flash_piix4(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint16_t old, new;
 	uint16_t xbcs = 0x4e;	/* X-Bus Chip Select register. */
@@ -565,22 +565,22 @@
 	return enable_flash_ich_bios_cntl_config_space(dev, ich_generation, bios_cntl);
 }
 
-static int enable_flash_ich0(struct pci_dev *dev, const char *name)
+static int enable_flash_ich0(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_fwh(dev, CHIPSET_ICH, 0x4e);
 }
 
-static int enable_flash_ich2345(struct pci_dev *dev, const char *name)
+static int enable_flash_ich2345(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_fwh(dev, CHIPSET_ICH2345, 0x4e);
 }
 
-static int enable_flash_ich6(struct pci_dev *dev, const char *name)
+static int enable_flash_ich6(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_fwh(dev, CHIPSET_ICH6, 0xdc);
 }
 
-static int enable_flash_poulsbo(struct pci_dev *dev, const char *name)
+static int enable_flash_poulsbo(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_fwh(dev, CHIPSET_POULSBO, 0xd8);
 }
@@ -817,80 +817,80 @@
 	return 0;
 }
 
-static int enable_flash_tunnelcreek(struct pci_dev *dev, const char *name)
+static int enable_flash_tunnelcreek(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_TUNNEL_CREEK, 0xd8);
 }
 
-static int enable_flash_s12x0(struct pci_dev *dev, const char *name)
+static int enable_flash_s12x0(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_CENTERTON, 0xd8);
 }
 
-static int enable_flash_ich7(struct pci_dev *dev, const char *name)
+static int enable_flash_ich7(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_ICH7, 0xdc);
 }
 
-static int enable_flash_ich8(struct pci_dev *dev, const char *name)
+static int enable_flash_ich8(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_ICH8, 0xdc);
 }
 
-static int enable_flash_ich9(struct pci_dev *dev, const char *name)
+static int enable_flash_ich9(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_ICH9, 0xdc);
 }
 
-static int enable_flash_ich10(struct pci_dev *dev, const char *name)
+static int enable_flash_ich10(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_ICH10, 0xdc);
 }
 
 /* Ibex Peak aka. 5 series & 3400 series */
-static int enable_flash_pch5(struct pci_dev *dev, const char *name)
+static int enable_flash_pch5(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_5_SERIES_IBEX_PEAK, 0xdc);
 }
 
 /* Cougar Point aka. 6 series & c200 series */
-static int enable_flash_pch6(struct pci_dev *dev, const char *name)
+static int enable_flash_pch6(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_6_SERIES_COUGAR_POINT, 0xdc);
 }
 
 /* Panther Point aka. 7 series */
-static int enable_flash_pch7(struct pci_dev *dev, const char *name)
+static int enable_flash_pch7(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_7_SERIES_PANTHER_POINT, 0xdc);
 }
 
 /* Lynx Point aka. 8 series */
-static int enable_flash_pch8(struct pci_dev *dev, const char *name)
+static int enable_flash_pch8(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT, 0xdc);
 }
 
 /* Lynx Point LP aka. 8 series low-power */
-static int enable_flash_pch8_lp(struct pci_dev *dev, const char *name)
+static int enable_flash_pch8_lp(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_LYNX_POINT_LP, 0xdc);
 }
 
 /* Wellsburg (for Haswell-EP Xeons) */
-static int enable_flash_pch8_wb(struct pci_dev *dev, const char *name)
+static int enable_flash_pch8_wb(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_8_SERIES_WELLSBURG, 0xdc);
 }
 
 /* Wildcat Point */
-static int enable_flash_pch9(struct pci_dev *dev, const char *name)
+static int enable_flash_pch9(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_9_SERIES_WILDCAT_POINT, 0xdc);
 }
 
 /* Wildcat Point LP */
-static int enable_flash_pch9_lp(struct pci_dev *dev, const char *name)
+static int enable_flash_pch9_lp(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return enable_flash_ich_spi(dev, CHIPSET_9_SERIES_WILDCAT_POINT_LP, 0xdc);
 }
@@ -965,37 +965,44 @@
 	return ret;
 }
 
-static int enable_flash_pch100(struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch100(struct flashprog_programmer *const prog,
+			       struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_100_SERIES_SUNRISE_POINT);
 }
 
-static int enable_flash_c620(struct pci_dev *const dev, const char *const name)
+static int enable_flash_c620(struct flashprog_programmer *const prog,
+			     struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_C620_SERIES_LEWISBURG);
 }
 
-static int enable_flash_pch300(struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch300(struct flashprog_programmer *const prog,
+			       struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_300_SERIES_CANNON_POINT);
 }
 
-static int enable_flash_pch500(struct pci_dev *const dev, const char *const name)
+static int enable_flash_pch500(struct flashprog_programmer *const prog,
+			       struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_500_SERIES_TIGER_POINT);
 }
 
-static int enable_flash_mcc(struct pci_dev *const dev, const char *const name)
+static int enable_flash_mcc(struct flashprog_programmer *const prog,
+			    struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_ELKHART_LAKE);
 }
 
-static int enable_flash_apl(struct pci_dev *const dev, const char *const name)
+static int enable_flash_apl(struct flashprog_programmer *const prog,
+			    struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x0d, 2, CHIPSET_APOLLO_LAKE);
 }
 
-static int enable_flash_glk(struct pci_dev *const dev, const char *const name)
+static int enable_flash_glk(struct flashprog_programmer *prog,
+			    struct pci_dev *const dev, const char *const name)
 {
 	return enable_flash_pch100_or_c620(dev, name, 0x0d, 2, CHIPSET_GEMINI_LAKE);
 }
@@ -1010,7 +1017,7 @@
  *	- SPIBAR (coined SBASE) at LPC config 0x54 (instead of [RCRB] + 0x3800).
  *	- BIOS_CNTL (coined BCR) at [SPIBAR] + 0xFC (instead of LPC config 0xDC).
  */
-static int enable_flash_silvermont(struct pci_dev *dev, const char *name)
+static int enable_flash_silvermont(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	enum ich_chipset ich_generation = CHIPSET_BAYTRAIL;
 
@@ -1058,7 +1065,7 @@
 	return 0;
 }
 
-static int via_no_byte_merge(struct pci_dev *dev, const char *name)
+static int via_no_byte_merge(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t val;
 
@@ -1071,7 +1078,7 @@
 	return NOT_DONE_YET;	/* need to find south bridge, too */
 }
 
-static int enable_flash_vt823x(struct pci_dev *dev, const char *name)
+static int enable_flash_vt823x(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t val;
 
@@ -1098,7 +1105,7 @@
 	return 0;
 }
 
-static int enable_flash_vt_vx(struct pci_dev *dev, const char *name)
+static int enable_flash_vt_vx(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	struct pci_dev *south_north = pcidev_find(0x1106, 0xa353);
 	if (south_north == NULL) {
@@ -1109,7 +1116,7 @@
 	msg_pdbg("Strapped to ");
 	if ((pci_read_byte(south_north, 0x56) & 0x01) == 0) {
 		msg_pdbg("LPC.\n");
-		return enable_flash_vt823x(dev, name);
+		return enable_flash_vt823x(prog, dev, name);
 	}
 	msg_pdbg("SPI.\n");
 
@@ -1162,12 +1169,12 @@
 	return via_init_spi(spi0_mm_base);
 }
 
-static int enable_flash_vt8237s_spi(struct pci_dev *dev, const char *name)
+static int enable_flash_vt8237s_spi(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	return via_init_spi(pci_read_long(dev, 0xbc) << 8);
 }
 
-static int enable_flash_cs5530(struct pci_dev *dev, const char *name)
+static int enable_flash_cs5530(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t reg8;
 
@@ -1231,7 +1238,7 @@
  * To enable write to NOR Boot flash for the benefit of systems that have such
  * a setup, raise MSR 0x51400018 WE_CS3 (write enable Boot Flash Chip Select).
  */
-static int enable_flash_cs5536(struct pci_dev *dev, const char *name)
+static int enable_flash_cs5536(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 #define MSR_RCONF_DEFAULT	0x1808
 #define MSR_NORF_CTL		0x51400018
@@ -1260,7 +1267,7 @@
 	return 0;
 }
 
-static int enable_flash_sc1100(struct pci_dev *dev, const char *name)
+static int enable_flash_sc1100(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	#define SC_REG 0x52
 	uint8_t new;
@@ -1319,14 +1326,14 @@
 	return 0;
 }
 
-static int enable_flash_amd_768_8111(struct pci_dev *dev, const char *name)
+static int enable_flash_amd_768_8111(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	/* Enable decoding of 0xFFB00000 to 0xFFFFFFFF (5 MB). */
 	max_rom_decode.lpc = 5 * 1024 * 1024;
 	return enable_flash_amd_via(dev, name, 0xC0);
 }
 
-static int enable_flash_vt82c586(struct pci_dev *dev, const char *name)
+static int enable_flash_vt82c586(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	/* Enable decoding of 0xFFF80000 to 0xFFFFFFFF. (512 kB) */
 	max_rom_decode.parallel = 512 * 1024;
@@ -1334,14 +1341,14 @@
 }
 
 /* Works for VT82C686A/B too. */
-static int enable_flash_vt82c596(struct pci_dev *dev, const char *name)
+static int enable_flash_vt82c596(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	/* Enable decoding of 0xFFF00000 to 0xFFFFFFFF. (1 MB) */
 	max_rom_decode.parallel = 1024 * 1024;
 	return enable_flash_amd_via(dev, name, 0xE0);
 }
 
-static int enable_flash_sb600(struct pci_dev *dev, const char *name)
+static int enable_flash_sb600(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint32_t prot;
 	uint8_t reg;
@@ -1414,7 +1421,7 @@
 	return ret;
 }
 
-static int enable_flash_sb600_smbus(struct pci_dev *smbus, const char *name)
+static int enable_flash_sb600_smbus(struct flashprog_programmer *prog, struct pci_dev *smbus, const char *name)
 {
 	struct pci_dev *const lpc = pci_get_dev(pacc, smbus->domain, smbus->bus, smbus->dev, 3);
 	if (!lpc) {
@@ -1422,10 +1429,10 @@
 		return ERROR_FATAL;
 	}
 
-	return enable_flash_sb600(lpc, name);
+	return enable_flash_sb600(prog, lpc, name);
 }
 
-static int enable_flash_amd_spi100(struct pci_dev *const smbus, const char *const name)
+static int enable_flash_amd_spi100(struct flashprog_programmer *prog, struct pci_dev *const smbus, const char *const name)
 {
 	struct pci_dev *const lpc = pci_get_dev(pacc, smbus->domain, smbus->bus, smbus->dev, 3);
 	if (!lpc) {
@@ -1493,7 +1500,7 @@
 	return 0;
 }
 
-static int enable_flash_nvidia_nforce2(struct pci_dev *dev, const char *name)
+static int enable_flash_nvidia_nforce2(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	rpci_write_byte(dev, 0x92, 0);
 	if (enable_flash_nvidia_common(dev, name))
@@ -1502,7 +1509,7 @@
 		return 0;
 }
 
-static int enable_flash_ck804(struct pci_dev *dev, const char *name)
+static int enable_flash_ck804(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint32_t segctrl;
 	uint8_t reg, old, new;
@@ -1577,7 +1584,7 @@
 		return 0;
 }
 
-static int enable_flash_osb4(struct pci_dev *dev, const char *name)
+static int enable_flash_osb4(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 
@@ -1595,7 +1602,7 @@
 }
 
 /* ATI Technologies Inc IXP SB400 PCI-ISA Bridge (rev 80) */
-static int enable_flash_sb400(struct pci_dev *dev, const char *name)
+static int enable_flash_sb400(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t tmp;
 	struct pci_dev *smbusdev;
@@ -1630,7 +1637,7 @@
 	return 0;
 }
 
-static int enable_flash_mcp55(struct pci_dev *dev, const char *name)
+static int enable_flash_mcp55(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t val;
 	uint16_t wordval;
@@ -1657,7 +1664,7 @@
  * It is assumed that LPC chips need the MCP55 code and SPI chips need the
  * code provided in enable_flash_mcp6x_7x_common.
  */
-static int enable_flash_mcp6x_7x(struct pci_dev *dev, const char *name)
+static int enable_flash_mcp6x_7x(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	int ret = 0, want_spi = 0;
 	uint8_t val;
@@ -1669,7 +1676,7 @@
 
 	switch ((val >> 5) & 0x3) {
 	case 0x0:
-		ret = enable_flash_mcp55(dev, name);
+		ret = enable_flash_mcp55(prog, dev, name);
 		internal_buses_supported &= BUS_LPC;
 		msg_pdbg("Flash bus type is LPC\n");
 		break;
@@ -1708,7 +1715,7 @@
 	return ret;
 }
 
-static int enable_flash_ht1000(struct pci_dev *dev, const char *name)
+static int enable_flash_ht1000(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	uint8_t val;
 
@@ -1731,7 +1738,7 @@
  * complete flash is mapped somewhere below 1G. The position can be determined
  * by the BOOTCS PAR register.
  */
-static int get_flashbase_sc520(struct pci_dev *dev, const char *name)
+static int get_flashbase_sc520(struct flashprog_programmer *prog, struct pci_dev *dev, const char *name)
 {
 	int i, bootcs_found = 0;
 	uint32_t parx = 0;
@@ -2221,7 +2228,7 @@
 	{0},
 };
 
-int chipset_flash_enable(void)
+int chipset_flash_enable(struct flashprog_programmer *const prog)
 {
 	struct pci_dev *dev = NULL;
 	int ret = -2;		/* Nothing! */
@@ -2275,7 +2282,7 @@
 			continue;
 		}
 		msg_pinfo("Enabling flash write... "); msg_pdbg("\n");
-		ret = chipset_enables[i].doit(dev, chipset_enables[i].device_name);
+		ret = chipset_enables[i].doit(prog, dev, chipset_enables[i].device_name);
 		if (ret == NOT_DONE_YET) {
 			ret = -2;
 			msg_pinfo("OK - searching further chips.\n");
diff --git a/include/programmer.h b/include/programmer.h
index 36067a2..6425788 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -154,7 +154,7 @@
 	const enum test_state status;
 	const char *vendor_name;
 	const char *device_name;
-	int (*doit) (struct pci_dev *dev, const char *name);
+	int (*doit) (struct flashprog_programmer *, struct pci_dev *, const char *name);
 };
 
 extern const struct penable chipset_enables[];
@@ -235,7 +235,7 @@
 int board_flash_enable(struct flashprog_programmer *, const char *vendor, const char *model, const char *cb_vendor, const char *cb_model);
 
 /* chipset_enable.c */
-int chipset_flash_enable(void);
+int chipset_flash_enable(struct flashprog_programmer *);
 
 /* processor_enable.c */
 int processor_flash_enable(void);
diff --git a/internal.c b/internal.c
index 103cb83..72a7a22 100644
--- a/internal.c
+++ b/internal.c
@@ -257,7 +257,7 @@
 	/* try to enable it. Failure IS an option, since not all motherboards
 	 * really need this to be done, etc., etc.
 	 */
-	ret = chipset_flash_enable();
+	ret = chipset_flash_enable(prog);
 	if (ret == -2) {
 		msg_perr("WARNING: No chipset found. Flash detection "
 			 "will most likely fail.\n");