)]}'
{
  "commit": "90021f28ff6cb97c53aeb18667addefb43c706e3",
  "tree": "7ec04388c7b9dbb9796953d6616b855bf451d341",
  "parents": [
    "859f3f0d751e92ec99c79408a4a7789bfb61a514"
  ],
  "author": {
    "name": "Mark Marshall",
    "email": "mark.marshall@csr.com",
    "time": "Fri Dec 03 14:48:11 2010 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Fri Dec 03 14:48:11 2010 +0000"
  },
  "message": "Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer\n\nThe project is in the the process of designing and making a complete,\nopen source, graphics card. More info at http://wiki.opengraphics.org.\n\nThe first development card is a PCI add in card containing a couple of\nFPGAs and a couple of serial flash chips (amongst other things). The\nFPGAs are called XP10 and S3 (their part numbers). The XP10 contains its\nown flash and does not need to be programmed by flashrom - it ensures\nthat the device can enumerate on the PCI bus without needing further\nconfiguration.\n\nThe larger FPGA is the S3. This is configured from a large SPI flash\n(2 MBytes). The second SPI flash is used to store the VGA BIOS. It is\nsmaller (128 KBytes). This patch adds support for programming either of\nthe two SPI flash chips.\n\nThe programmer device takes one configuration option which selects which\nof the two flash chips is accessed. This must be set to either \"cprom\"\nor \"bprom\". (The project refers to the two chips as \"cprom\" / \"bprom\",\n\"s3\" and \"bios\" are more readable alternatives).\n\nAdd support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested\nfor write.\n\nCorresponding to flashrom svn r1241.\n\nSigned-off-by: Mark Marshall \u003cmark.marshall@csr.com\u003e\nAcked-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\n",
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