diff --git a/ichspi.c b/ichspi.c
index ff20f94..0996d2d 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -22,6 +22,7 @@
 #if defined(__i386__) || defined(__x86_64__)
 
 #include <string.h>
+#include <stdbool.h>
 #include <stdlib.h>
 #include "flash.h"
 #include "programmer.h"
@@ -232,7 +233,7 @@
 };
 
 /* ICH SPI configuration lock-down. May be set during chipset enabling. */
-static int ichspi_lock = 0;
+static bool ichspi_lock = false;
 
 static enum ich_chipset ich_generation = CHIPSET_ICH_UNKNOWN;
 static uint32_t ichspi_bbar;
@@ -840,7 +841,7 @@
 static int ich7_run_opcode(OPCODE op, uint32_t offset,
 			   uint8_t datalength, uint8_t * data, int maxdata)
 {
-	int write_cmd = 0;
+	bool write_cmd = false;
 	int timeout;
 	uint32_t temp32;
 	uint16_t temp16;
@@ -850,7 +851,7 @@
 	/* Is it a write command? */
 	if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
 	    || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
-		write_cmd = 1;
+		write_cmd = true;
 	}
 
 	timeout = 100 * 60;	/* 60 ms are 9.6 million cycles at 16 MHz. */
@@ -958,7 +959,7 @@
 static int ich9_run_opcode(OPCODE op, uint32_t offset,
 			   uint8_t datalength, uint8_t * data)
 {
-	int write_cmd = 0;
+	bool write_cmd = false;
 	int timeout;
 	uint32_t temp32;
 	uint64_t opmenu;
@@ -967,7 +968,7 @@
 	/* Is it a write command? */
 	if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
 	    || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
-		write_cmd = 1;
+		write_cmd = true;
 	}
 
 	timeout = 100 * 60;	/* 60 ms are 9.6 million cycles at 16 MHz. */
@@ -1728,7 +1729,7 @@
 	uint32_t tmp;
 	char *arg;
 	int ich_spi_rw_restricted = 0;
-	int desc_valid = 0;
+	bool desc_valid = false;
 	struct ich_descriptors desc = { 0 };
 	enum ich_spi_mode {
 		ich_auto,
@@ -1819,7 +1820,7 @@
 		}
 		if (mmio_readw(ich_spibar) & (1 << 15)) {
 			msg_pwarn("WARNING: SPI Configuration Lockdown activated.\n");
-			ichspi_lock = 1;
+			ichspi_lock = true;
 		}
 		ich_init_opcodes();
 		ich_set_bbar(0);
@@ -1854,10 +1855,10 @@
 		prettyprint_ich9_reg_hsfs(tmp2);
 		if (tmp2 & HSFS_FLOCKDN) {
 			msg_pinfo("SPI Configuration is locked down.\n");
-			ichspi_lock = 1;
+			ichspi_lock = true;
 		}
 		if (tmp2 & HSFS_FDV)
-			desc_valid = 1;
+			desc_valid = true;
 		if (!(tmp2 & HSFS_FDOPSS) && desc_valid)
 			msg_pinfo("The Flash Descriptor Override Strap-Pin is set. Restrictions implied by\n"
 				  "the Master Section of the flash descriptor are NOT in effect. Please note\n"
@@ -2120,7 +2121,7 @@
 		 mmio_readw(ich_spibar + 0x6c));
 	if (mmio_readw(ich_spibar) & (1 << 15)) {
 		msg_pwarn("Warning: SPI Configuration Lockdown activated.\n");
-		ichspi_lock = 1;
+		ichspi_lock = true;
 	}
 
 	ich_set_bbar(0);