)]}'
{
  "commit": "8a19ef1f6724bd6dfd19a8c7d5ff521bc62e5632",
  "tree": "0a7cc883e6a343e3e8f4a4652e39913862829f75",
  "parents": [
    "c753e5bbf9805ea2ec703e5013705a438747f223"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Feb 15 22:44:27 2011 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Feb 15 22:44:27 2011 +0000"
  },
  "message": "Support 64-bit MEM BARs wherever possible\n\nAdd more sanity checks for BARs and abort if resources are unreachable.\nUndecoded resources are reported, but flashrom will proceed anyway just\nin case the BIOS screwed up the configuration.\n\n(The empty CardBus handler is intentional, according to the spec no BARs\nin PCI config space are used by CardBus.)\n\nFound while working on a driver for the Angelbird PCIe-based SSD which\nhas 64-bit capable MEM BARs.\n\nCorresponding to flashrom svn r1261.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstefan.reinauer@coreboot.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b569df4d708178f3cb77de7bd0cd2fcc0b3694c3",
      "old_mode": 33188,
      "old_path": "pcidev.c",
      "new_id": "5eddf79b2ea586b15bacf054ac8fc8a2309b3d77",
      "new_mode": 33188,
      "new_path": "pcidev.c"
    },
    {
      "type": "modify",
      "old_id": "1f5fa25ebe4fc3cdf22a2023b0a80af5d19629e4",
      "old_mode": 33188,
      "old_path": "programmer.h",
      "new_id": "da49096b5f9515b8225f07ef14cc6a8c53a92f03",
      "new_mode": 33188,
      "new_path": "programmer.h"
    }
  ]
}