memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`
We used to store the maximum decode size, i.e. the maximum memory-mapped
range of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There
was no programmer in the tree that really made use of it, though:
* The chipset drivers usually focus on a single bus type. And even if
they advertise the whole default set (PAR, LPC, FWH), they only pro-
vide a maximum decode size for one of them. The latter is probably
wrong, should really more than one bus type be supported.
* PCI and external programmers all support only a single bus type, with
the exception of `serprog` which doesn't set a maximum decode size.
What made the distinction even less useful is that for some chips that
support multiple bus types, i.e. LPC+FWH, we can't even detect which
type it is. The existing code around this also only tried to provide
the best possible warning message at the expense of breaking the pro-
grammer abstraction.
Hence, unify the set of sizes into a single `max_rom_decode` property.
We store it inside the `registered_master` struct right away, to avoid
any more use of globals.
Change-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531
diff --git a/it87spi.c b/it87spi.c
index 6dfbe5c..25e826e 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -233,11 +233,11 @@
if (internal_buses_supported & BUS_SPI)
msg_pdbg("Overriding chipset SPI with IT87 SPI.\n");
/* FIXME: Add the SPI bus or replace the other buses with it? */
- register_spi_master(&spi_master_it87xx, NULL);
+ register_spi_master(&spi_master_it87xx, 0, NULL);
return 0;
}
-int init_superio_ite(void)
+int init_superio_ite(struct flashprog_programmer *const prog)
{
int i;
int ret = 0;
@@ -248,7 +248,7 @@
switch (superios[i].model) {
case 0x8705:
- ret |= it8705f_write_enable(superios[i].port);
+ ret |= it8705f_write_enable(prog, superios[i].port);
break;
case 0x8686:
case 0x8716: