memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`

We used to store the maximum decode size, i.e. the maximum memory-mapped
range of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There
was no programmer in the tree that really made use of it, though:
* The chipset drivers usually focus on a single bus type. And even if
  they advertise the whole default set (PAR, LPC, FWH), they only pro-
  vide a maximum decode size for one of them. The latter is probably
  wrong, should really more than one bus type be supported.
* PCI and external programmers all support only a single bus type, with
  the exception of `serprog` which doesn't set a maximum decode size.

What made the distinction even less useful is that for some chips that
support multiple bus types, i.e. LPC+FWH, we can't even detect which
type it is. The existing code around this also only tried to provide
the best possible warning message at the expense of breaking the pro-
grammer abstraction.

Hence, unify the set of sizes into a single `max_rom_decode` property.
We store it inside the `registered_master` struct right away, to avoid
any more use of globals.

Change-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531
diff --git a/internal.c b/internal.c
index 72a7a22..8af2690 100644
--- a/internal.c
+++ b/internal.c
@@ -180,6 +180,19 @@
 	if (ret)
 		return ret;
 
+	struct internal_data *const internal = malloc(sizeof(*internal));
+	if (!internal) {
+		msg_perr("Out of memory!\n");
+		ret = 1;
+		goto internal_init_exit;
+	}
+	if (register_shutdown(shutdown_free, internal)) {
+		ret = 1;
+		goto internal_init_exit;
+	}
+	internal->max_rom_decode = 0;
+	prog->data = internal;
+
 	/* Unconditionally reset global state from previous operation. */
 	laptop_ok = false;
 
@@ -268,7 +281,7 @@
 #if defined(__i386__) || defined(__x86_64__)
 	/* Probe unconditionally for ITE Super I/O chips. This enables LPC->SPI translation on IT87* and
 	 * parallel writes on IT8705F. Also, this handles the manual chip select for Gigabyte's DualBIOS. */
-	init_superio_ite();
+	init_superio_ite(prog);
 
 	if (board_flash_enable(prog, board_vendor, board_model, cb_vendor, cb_model)) {
 		msg_perr("Aborting to be safe.\n");
@@ -277,8 +290,10 @@
 	}
 #endif
 
-	if (internal_buses_supported & BUS_NONSPI)
-		register_par_master(&par_master_internal, internal_buses_supported, NULL);
+	if (internal_buses_supported & BUS_NONSPI) {
+		register_par_master(&par_master_internal, internal_buses_supported,
+				    internal->max_rom_decode, NULL);
+	}
 
 	/* Report if a non-whitelisted laptop is detected that likely uses a legacy bus. */
 	if (is_laptop && !laptop_ok) {