)]}'
{
  "commit": "82fe12380a10ce24680ef7e4e4ea682ecc58a20c",
  "tree": "79dad3c3ba40a89360bab43d786ef8b3c0c44b9a",
  "parents": [
    "157b81865725e9c544c9da323ab8ff93ff2c1ae5"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Jul 19 17:28:47 2024 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Nov 10 13:58:05 2024 +0000"
  },
  "message": "ich_descriptors: Hard code number of masters for newer gens\n\nThe number of masters (NM) field is ignored by the hardware and often\nnot updated in Intel\u0027s tooling.  Since PCH100 / Skylake,  it\u0027s always\nbeen 2 masters for the small core, 5 for the big core,  and 6 for the\nserver platforms.\n\nChange-Id: I4975f5b55981791fa5b10c4731af8f330cbbefa8\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/185\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f24d3534fdce8e8411eebacd8cecf341b8dbc50f",
      "old_mode": 33188,
      "old_path": "ich_descriptors.c",
      "new_id": "dfc1cb8644fa7692d134ee170d18f150019de463",
      "new_mode": 33188,
      "new_path": "ich_descriptors.c"
    }
  ]
}