tree bf2c2e3b17f8673d2857b0d7021fc34d0c124bef
parent 0e0a0dc05d8647ec5800ec439b7a8cb0586caa50
author Martin Roth <martin.roth@se-eng.com> 1405432258 +0000
committer Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> 1405432258 +0000

Add support for AMD Bolton chipset

SPI controller on the bolton chipset uses the same 3-bit speed
settings as Yangtze, but is otherwise the same as the Hudson chips.
Note that the Bolton RRG doesn't specify a speed setting for the bit
setting of 0b111, so I'm assuming that it's the same setting as
Yangtze.

Corresponding to flashrom svn r1830.

Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>