)]}'
{
  "commit": "82b6ec1df30d3fca55547f230c76718d6e613b2a",
  "tree": "bf2c2e3b17f8673d2857b0d7021fc34d0c124bef",
  "parents": [
    "0e0a0dc05d8647ec5800ec439b7a8cb0586caa50"
  ],
  "author": {
    "name": "Martin Roth",
    "email": "martin.roth@se-eng.com",
    "time": "Tue Jul 15 13:50:58 2014 +0000"
  },
  "committer": {
    "name": "Stefan Tauner",
    "email": "stefan.tauner@alumni.tuwien.ac.at",
    "time": "Tue Jul 15 13:50:58 2014 +0000"
  },
  "message": "Add support for AMD Bolton chipset\n\nSPI controller on the bolton chipset uses the same 3-bit speed\nsettings as Yangtze, but is otherwise the same as the Hudson chips.\nNote that the Bolton RRG doesn\u0027t specify a speed setting for the bit\nsetting of 0b111, so I\u0027m assuming that it\u0027s the same setting as\nYangtze.\n\nCorresponding to flashrom svn r1830.\n\nSigned-off-by: Martin Roth \u003cmartin.roth@se-eng.com\u003e\nSigned-off-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\nAcked-by: Stefan Tauner \u003cstefan.tauner@alumni.tuwien.ac.at\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "9d70c00c3955e48e2a8aa4b6f572628567595d3c",
      "old_mode": 33188,
      "old_path": "sb600spi.c",
      "new_id": "b7f87caf6e1d4a7903227c7ba7cdf38103f0216f",
      "new_mode": 33188,
      "new_path": "sb600spi.c"
    }
  ]
}