)]}'
{
  "commit": "7eb38aa7dbd45cbc040ac513ed4375995246aa93",
  "tree": "0b96573c7ec755ca09aa8799501e307284f337e6",
  "parents": [
    "17890b37f362e551e886506f39e7bf7181419457"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.huber@secunet.com",
    "time": "Thu Mar 21 15:42:54 2019 +0100"
  },
  "committer": {
    "name": "David Hendricks",
    "email": "david.hendricks@gmail.com",
    "time": "Tue Jun 04 13:54:54 2019 +0000"
  },
  "message": "dediprog: Implement 4BA EAR mode for protocol v1\n\nWith an SF100 and protocol version 1, using the extended address\nregister of the flash chip seems safe. Make use of that and remove\nthe broken 4BA modes flag.\n\nTested with SF100 V:5.1.9 and W25Q256FV.\n\nChange-Id: If926cf3cbbebf88231116c4d65bafc19d23646f6\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom/+/32016\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "134ed265c0353ddd897e0704b05133c619190fee",
      "old_mode": 33188,
      "old_path": "chipdrivers.h",
      "new_id": "e380878d0c082d9caa3ee602a84d129adf9cca8e",
      "new_mode": 33188,
      "new_path": "chipdrivers.h"
    },
    {
      "type": "modify",
      "old_id": "03675e57ac710a764dba02784f2f1a17a58bf5cc",
      "old_mode": 33188,
      "old_path": "dediprog.c",
      "new_id": "d48c541ec048665fc3c0d7b3cb771d42b9d4d808",
      "new_mode": 33188,
      "new_path": "dediprog.c"
    },
    {
      "type": "modify",
      "old_id": "8b6c46264943adfa5f4edd443d249920954e5daa",
      "old_mode": 33188,
      "old_path": "spi25.c",
      "new_id": "fd87dc9a55155e5d11d99c070ab55b7737476277",
      "new_mode": 33188,
      "new_path": "spi25.c"
    }
  ]
}