)]}'
{
  "commit": "7b61df80fb9fa12c3fdb32813336d7d0821ae7e3",
  "tree": "ad66976a2ec056611510ebd91f65fb38e70b8caf",
  "parents": [
    "4b933f0c5e7e4fefd5df03642562988be2159241"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Sep 14 01:29:49 2010 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Sep 14 01:29:49 2010 +0000"
  },
  "message": "Use caching for Nvidia MCP SPI GPIO accesses\n\nReduce clock delay to zero.\n\nTests show more than 2x speedup.\n\nCorresponding to flashrom svn r1164.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nTested-by: Andrew Morgan \u003cziltro@ziltro.com\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "bfdef2d56588d1069eb8a447a1ca5303467c9bea",
      "old_mode": 33188,
      "old_path": "mcp6x_spi.c",
      "new_id": "6635ddd5df2e7677a3acb1d4f08356cf36d85f41",
      "new_mode": 33188,
      "new_path": "mcp6x_spi.c"
    }
  ]
}