diff --git a/Makefile b/Makefile
index e3c1154..6e6e2de 100644
--- a/Makefile
+++ b/Makefile
@@ -119,7 +119,8 @@
 
 CHIP_OBJS = jedec.o stm50flw0x0x.o w39.o w29ee011.o \
 	sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
-	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o
+	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o sharplhf00l04.o \
+	a25.o at25.o
 
 LIB_OBJS = layout.o
 
diff --git a/a25.c b/a25.c
new file mode 100644
index 0000000..f38626c
--- /dev/null
+++ b/a25.c
@@ -0,0 +1,104 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include "flash.h"
+#include "chipdrivers.h"
+#include "spi.h"
+
+/* Prettyprint the status register. Works for AMIC A25L series. */
+
+int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Disable "
+		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	spi_prettyprint_status_register_bit(status, 6);
+	spi_prettyprint_status_register_bit(status, 5);
+	spi_prettyprint_status_register_bit(status, 4);
+	spi_prettyprint_status_register_bp3210(status, 1);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Disable "
+		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	spi_prettyprint_status_register_bit(status, 6);
+	spi_prettyprint_status_register_bit(status, 5);
+	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Disable "
+		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+	msg_cdbg("Chip status register: Top/Bottom (TB) "
+		 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_welwip(status);
+	msg_cdbg("Chip status register 2 is NOT decoded!\n");
+	return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Disable "
+		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+	msg_cdbg("Chip status register: Top/Bottom (TB) "
+		 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+	spi_prettyprint_status_register_bp3210(status, 2);
+	spi_prettyprint_status_register_welwip(status);
+	msg_cdbg("Chip status register 2 is NOT decoded!\n");
+	return 0;
+}
+
+/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
+ * spi_prettyprint_status_register_amic_a25l05p or
+ * spi_prettyprint_status_register_amic_a25l40p.
+ * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
+ * spi_prettyprint_status_register_amic_a25l032 or
+ * spi_prettyprint_status_register_amic_a25lq032 if those have locks controlled
+ * by the second status register.
+ */
diff --git a/at25.c b/at25.c
new file mode 100644
index 0000000..e55b007
--- /dev/null
+++ b/at25.c
@@ -0,0 +1,287 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+#include "flash.h"
+#include "chipdrivers.h"
+#include "spi.h"
+
+/* Prettyprint the status register. Works for Atmel A25/A26 series. */
+
+static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
+{
+	msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
+		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+}
+
+static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
+{
+	msg_cdbg("Chip status register: Erase/Program Error (EPE) "
+		 "is %sset\n", (status & (1 << 5)) ? "" : "not ");
+	msg_cdbg("Chip status register: WP# pin (WPP) "
+		 "is %sasserted\n", (status & (1 << 4)) ? "not " : "");
+}
+
+static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
+{
+	msg_cdbg("Chip status register: Software Protection Status (SWP): ");
+	switch (status & (3 << 2)) {
+	case 0x0 << 2:
+		msg_cdbg("no sectors are protected\n");
+		break;
+	case 0x1 << 2:
+		msg_cdbg("some sectors are protected\n");
+		/* FIXME: Read individual Sector Protection Registers. */
+		break;
+	case 0x3 << 2:
+		msg_cdbg("all sectors are protected\n");
+		break;
+	default:
+		msg_cdbg("reserved for future use\n");
+		break;
+	}
+}
+
+int spi_prettyprint_status_register_at25df(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	spi_prettyprint_status_register_atmel_at25_srpl(status);
+	spi_prettyprint_status_register_bit(status, 6);
+	spi_prettyprint_status_register_atmel_at25_epewpp(status);
+	spi_prettyprint_status_register_atmel_at25_swp(status);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
+{
+	/* FIXME: We should check the security lockdown. */
+	msg_cdbg("Ignoring security lockdown (if present)\n");
+	msg_cdbg("Ignoring status register byte 2\n");
+	return spi_prettyprint_status_register_at25df(flash);
+}
+
+int spi_prettyprint_status_register_at25f(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	spi_prettyprint_status_register_atmel_at25_srpl(status);
+	spi_prettyprint_status_register_bit(status, 6);
+	spi_prettyprint_status_register_atmel_at25_epewpp(status);
+	spi_prettyprint_status_register_bit(status, 3);
+	msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
+		 "%sset, %s sectors are protected\n",
+		 (status & (1 << 2)) ? "" : "not ",
+		 (status & (1 << 2)) ? "all" : "no");
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
+		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
+		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
+		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 4 is "
+		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
+		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
+		 "%sset\n", (status & (1 << 2)) ? "" : "not ");
+	/* FIXME: Pretty-print detailed sector protection status. */
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
+		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
+		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
+		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
+		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
+		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
+	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
+		 "%sset\n", (status & (1 << 2)) ? "" : "not ");
+	/* FIXME: Pretty-print detailed sector protection status. */
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash)
+{
+	uint8_t status;
+
+	status = spi_read_status_register();
+	msg_cdbg("Chip status register is %02x\n", status);
+
+	spi_prettyprint_status_register_atmel_at25_srpl(status);
+	msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) "
+		 "is %sset\n", (status & (1 << 6)) ? "" : "not ");
+	spi_prettyprint_status_register_atmel_at25_epewpp(status);
+	spi_prettyprint_status_register_atmel_at25_swp(status);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
+int spi_disable_blockprotect_at25df(struct flashchip *flash)
+{
+	uint8_t status;
+	int result;
+
+	status = spi_read_status_register();
+	/* If block protection is disabled, stop here. */
+	if ((status & (3 << 2)) == 0)
+		return 0;
+
+	msg_cdbg("Some block protection in effect, disabling\n");
+	if (status & (1 << 7)) {
+		msg_cdbg("Need to disable Sector Protection Register Lock\n");
+		if ((status & (1 << 4)) == 0) {
+			msg_cerr("WP# pin is active, disabling "
+				 "write protection is impossible.\n");
+			return 1;
+		}
+		/* All bits except bit 7 (SPRL) are readonly. */
+		result = spi_write_status_register(flash, status & ~(1 << 7));
+		if (result) {
+			msg_cerr("spi_write_status_register failed\n");
+			return result;
+		}
+		
+	}
+	/* Global unprotect. Make sure to mask SPRL as well. */
+	result = spi_write_status_register(flash, status & ~0xbc);
+	if (result) {
+		msg_cerr("spi_write_status_register failed\n");
+		return result;
+	}
+	status = spi_read_status_register();
+	if ((status & (3 << 2)) != 0) {
+		msg_cerr("Block protection could not be disabled!\n");
+		return 1;
+	}
+	return 0;
+}
+
+int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
+{
+	/* FIXME: We should check the security lockdown. */
+	msg_cinfo("Ignoring security lockdown (if present)\n");
+	return spi_disable_blockprotect_at25df(flash);
+}
+
+int spi_disable_blockprotect_at25f(struct flashchip *flash)
+{
+	/* spi_disable_blockprotect_at25df is not really the right way to do
+	 * this, but the side effects of said function work here as well.
+	 */
+	return spi_disable_blockprotect_at25df(flash);
+}
+
+int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
+{
+	uint8_t status;
+	int result;
+
+	status = spi_read_status_register();
+	/* If block protection is disabled, stop here. */
+	if ((status & 0x6c) == 0)
+		return 0;
+
+	msg_cdbg("Some block protection in effect, disabling\n");
+	if (status & (1 << 7)) {
+		msg_cdbg("Need to disable Status Register Write Protect\n");
+		/* Clear bit 7 (WPEN). */
+		result = spi_write_status_register(flash, status & ~(1 << 7));
+		if (result) {
+			msg_cerr("spi_write_status_register failed\n");
+			return result;
+		}
+	}
+	/* Global unprotect. Make sure to mask WPEN as well. */
+	result = spi_write_status_register(flash, status & ~0xec);
+	if (result) {
+		msg_cerr("spi_write_status_register failed\n");
+		return result;
+	}
+	status = spi_read_status_register();
+	if ((status & 0x6c) != 0) {
+		msg_cerr("Block protection could not be disabled!\n");
+		return 1;
+	}
+	return 0;
+}
+
+int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
+{
+	uint8_t status;
+	int result;
+
+	status = spi_read_status_register();
+	/* If block protection is disabled, stop here. */
+	if ((status & 0x7c) == 0)
+		return 0;
+
+	msg_cdbg("Some block protection in effect, disabling\n");
+	if (status & (1 << 7)) {
+		msg_cdbg("Need to disable Status Register Write Protect\n");
+		/* Clear bit 7 (WPEN). */
+		result = spi_write_status_register(flash, status & ~(1 << 7));
+		if (result) {
+			msg_cerr("spi_write_status_register failed\n");
+			return result;
+		}
+	}
+	/* Global unprotect. Make sure to mask WPEN as well. */
+	result = spi_write_status_register(flash, status & ~0xfc);
+	if (result) {
+		msg_cerr("spi_write_status_register failed\n");
+		return result;
+	}
+	status = spi_read_status_register();
+	if ((status & 0x7c) != 0) {
+		msg_cerr("Block protection could not be disabled!\n");
+		return 1;
+	}
+	return 0;
+}
diff --git a/chipdrivers.h b/chipdrivers.h
index 2c1cd8b..92ddbea 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -43,17 +43,12 @@
 int spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
 int spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
 uint8_t spi_read_status_register(void);
-int spi_prettyprint_status_register_at25df(struct flashchip *flash);
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
-int spi_prettyprint_status_register_at25f(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
+int spi_write_status_register(struct flashchip *flash, int status);
+void spi_prettyprint_status_register_bit(uint8_t status, int bit);
+void spi_prettyprint_status_register_bp3210(uint8_t status, int bp);
+void spi_prettyprint_status_register_welwip(uint8_t status);
+int spi_prettyprint_status_register(struct flashchip *flash);
 int spi_disable_blockprotect(struct flashchip *flash);
-int spi_disable_blockprotect_at25df(struct flashchip *flash);
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
-int spi_disable_blockprotect_at25f(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
 int spi_byte_program(int addr, uint8_t databyte);
 int spi_nbyte_program(int addr, uint8_t *bytes, int len);
 int spi_nbyte_read(int addr, uint8_t *bytes, int len);
@@ -61,6 +56,25 @@
 int spi_write_chunked(struct flashchip *flash, uint8_t *buf, int start, int len, int chunksize);
 int spi_aai_write(struct flashchip *flash, uint8_t *buf, int start, int len);
 
+/* a25.c */
+int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash);
+int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash);
+
+/* at25.c */
+int spi_prettyprint_status_register_at25df(struct flashchip *flash);
+int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash);
+int spi_prettyprint_status_register_at25f(struct flashchip *flash);
+int spi_prettyprint_status_register_at25fs010(struct flashchip *flash);
+int spi_prettyprint_status_register_at25fs040(struct flashchip *flash);
+int spi_prettyprint_status_register_atmel_at26df081a(struct flashchip *flash);
+int spi_disable_blockprotect_at25df(struct flashchip *flash);
+int spi_disable_blockprotect_at25df_sec(struct flashchip *flash);
+int spi_disable_blockprotect_at25f(struct flashchip *flash);
+int spi_disable_blockprotect_at25fs010(struct flashchip *flash);
+int spi_disable_blockprotect_at25fs040(struct flashchip *flash);
+
 /* 82802ab.c */
 uint8_t wait_82802ab(struct flashchip *flash);
 int probe_82802ab(struct flashchip *flash);
diff --git a/flashchips.c b/flashchips.c
index 60d95ce..d1bf2fe 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -546,6 +546,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -577,6 +578,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -609,6 +611,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -641,6 +644,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -673,6 +677,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -705,6 +710,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l05p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -742,6 +748,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -774,6 +781,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -806,6 +814,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -841,6 +850,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -876,6 +886,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -906,6 +917,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -936,6 +948,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -966,6 +979,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -996,6 +1010,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1026,6 +1041,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1056,6 +1072,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l40p,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1092,6 +1109,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25l032,
 		.unlock		= NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1128,6 +1146,7 @@
 				.block_erase = spi_block_erase_c7,
 			}			
 		},
+		.printlock	= spi_prettyprint_status_register_amic_a25lq032,
 		.unlock		= NULL, /* Two status reg bytes (read with 0x35 and 0x05) */
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1746,6 +1765,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_atmel_at26df081a,
 		.unlock		= spi_disable_blockprotect_at25df,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1781,6 +1801,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_at25df,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1816,6 +1837,7 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
+		.printlock	= spi_prettyprint_status_register_atmel_at26df081a,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
@@ -1833,6 +1855,7 @@
 		.tested		= TEST_UNTESTED,
 		.probe		= probe_spi_rdid,
 		.probe_timing	= TIMING_ZERO,
+		.printlock	= spi_prettyprint_status_register_atmel_at26df081a,
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
diff --git a/spi25.c b/spi25.c
index b3bd7a1..ab272c9 100644
--- a/spi25.c
+++ b/spi25.c
@@ -29,8 +29,6 @@
 #include "programmer.h"
 #include "spi.h"
 
-void spi_prettyprint_status_register(struct flashchip *flash);
-
 static int spi_rdid(unsigned char *readarr, int bytes)
 {
 	static const unsigned char cmd[JEDEC_RDID_OUTSIZE] = { JEDEC_RDID };
@@ -312,7 +310,7 @@
 }
 
 /* Prettyprint the status register. Common definitions. */
-static void spi_prettyprint_status_register_welwip(uint8_t status)
+void spi_prettyprint_status_register_welwip(uint8_t status)
 {
 	msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
 		     "%sset\n", (status & (1 << 1)) ? "" : "not ");
@@ -321,145 +319,39 @@
 }
 
 /* Prettyprint the status register. Common definitions. */
+void spi_prettyprint_status_register_bp3210(uint8_t status, int bp)
+{
+	switch (bp) {
+	/* Fall through. */
+	case 3:
+		msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) "
+			     "is %sset\n", (status & (1 << 5)) ? "" : "not ");
+	case 2:
+		msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) "
+			     "is %sset\n", (status & (1 << 4)) ? "" : "not ");
+	case 1:
+		msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) "
+			     "is %sset\n", (status & (1 << 3)) ? "" : "not ");
+	case 0:
+		msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) "
+			     "is %sset\n", (status & (1 << 2)) ? "" : "not ");
+	}
+}
+
+/* Prettyprint the status register. Unnamed bits. */
+void spi_prettyprint_status_register_bit(uint8_t status, int bit)
+{
+	msg_cdbg("Chip status register: Bit %i "
+		 "is %sset\n", bit, (status & (1 << bit)) ? "" : "not ");
+}
+
 static void spi_prettyprint_status_register_common(uint8_t status)
 {
-	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
-		     "%sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
-		     "%sset\n", (status & (1 << 4)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
-		     "%sset\n", (status & (1 << 3)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
-		     "%sset\n", (status & (1 << 2)) ? "" : "not ");
+	spi_prettyprint_status_register_bp3210(status, 3);
 	spi_prettyprint_status_register_welwip(status);
 }
 
 /* Prettyprint the status register. Works for
- * AMIC A25L series
- */
-void spi_prettyprint_status_register_amic_a25l(uint8_t status)
-{
-	msg_cdbg("Chip status register: Status Register Write Disable "
-		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	spi_prettyprint_status_register_common(status);
-}
-
-/* Prettyprint the status register. Common definitions. */
-static void spi_prettyprint_status_register_at25_srplepewpp(uint8_t status)
-{
-	msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
-		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 "
-		 "is %sset\n", (status & (1 << 6)) ? "" : "not ");
-	msg_cdbg("Chip status register: Erase/Program Error (EPE) "
-		 "is %sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: WP# pin (WPP) "
-		 "is %sactive\n", (status & (1 << 4)) ? "not " : "");
-}
-
-int spi_prettyprint_status_register_at25df(struct flashchip *flash)
-{
-	uint8_t status;
-
-	status = spi_read_status_register();
-	msg_cdbg("Chip status register is %02x\n", status);
-
-	spi_prettyprint_status_register_at25_srplepewpp(status);
-	msg_cdbg("Chip status register: Software Protection Status (SWP): ");
-	switch (status & (3 << 2)) {
-	case 0x0 << 2:
-		msg_cdbg("no sectors are protected\n");
-		break;
-	case 0x1 << 2:
-		msg_cdbg("some sectors are protected\n");
-		/* FIXME: Read individual Sector Protection Registers. */
-		break;
-	case 0x3 << 2:
-		msg_cdbg("all sectors are protected\n");
-		break;
-	default:
-		msg_cdbg("reserved for future use\n");
-		break;
-	}
-	spi_prettyprint_status_register_welwip(status);
-	return 0;
-}
-
-int spi_prettyprint_status_register_at25df_sec(struct flashchip *flash)
-{
-	/* FIXME: We should check the security lockdown. */
-	msg_cdbg("Ignoring security lockdown (if present)\n");
-	msg_cdbg("Ignoring status register byte 2\n");
-	return spi_prettyprint_status_register_at25df(flash);
-}
-
-int spi_prettyprint_status_register_at25f(struct flashchip *flash)
-{
-	uint8_t status;
-
-	status = spi_read_status_register();
-	msg_cdbg("Chip status register is %02x\n", status);
-
-	spi_prettyprint_status_register_at25_srplepewpp(status);
-	msg_cdbg("Chip status register: Bit 3 "
-		 "is %sset\n", (status & (1 << 3)) ? "" : "not ");
-	msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
-		 "%sset, %s sectors are protected\n",
-		 (status & (1 << 2)) ? "" : "not ",
-		 (status & (1 << 2)) ? "all" : "no");
-	spi_prettyprint_status_register_welwip(status);
-	return 0;
-}
-
-int spi_prettyprint_status_register_at25fs010(struct flashchip *flash)
-{
-	uint8_t status;
-
-	status = spi_read_status_register();
-	msg_cdbg("Chip status register is %02x\n", status);
-
-	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
-		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
-		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
-		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 4 is "
-		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
-		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
-		 "%sset\n", (status & (1 << 2)) ? "" : "not ");
-	/* FIXME: Pretty-print detailed sector protection status. */
-	spi_prettyprint_status_register_welwip(status);
-	return 0;
-}
-
-int spi_prettyprint_status_register_at25fs040(struct flashchip *flash)
-{
-	uint8_t status;
-
-	status = spi_read_status_register();
-	msg_cdbg("Chip status register is %02x\n", status);
-
-	msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
-		 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
-		 "%sset\n", (status & (1 << 6)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
-		 "%sset\n", (status & (1 << 5)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
-		 "%sset\n", (status & (1 << 4)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
-		 "%sset\n", (status & (1 << 3)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
-		 "%sset\n", (status & (1 << 2)) ? "" : "not ");
-	/* FIXME: Pretty-print detailed sector protection status. */
-	spi_prettyprint_status_register_welwip(status);
-	return 0;
-}
-
-/* Prettyprint the status register. Works for
  * ST M25P series
  * MX MX25L series
  */
@@ -514,17 +406,13 @@
 		bpt[(status & 0x1c) >> 2]);
 }
 
-void spi_prettyprint_status_register(struct flashchip *flash)
+int spi_prettyprint_status_register(struct flashchip *flash)
 {
 	uint8_t status;
 
 	status = spi_read_status_register();
 	msg_cdbg("Chip status register is %02x\n", status);
 	switch (flash->manufacture_id) {
-	case AMIC_ID:
-		if ((flash->model_id & 0xff00) == 0x2000)
-		    spi_prettyprint_status_register_amic_a25l(status);
-		break;
 	case ST_ID:
 		if (((flash->model_id & 0xff00) == 0x2000) ||
 		    ((flash->model_id & 0xff00) == 0x2500))
@@ -549,6 +437,7 @@
 		}
 		break;
 	}
+	return 0;
 }
 
 int spi_chip_erase_60(struct flashchip *flash)
@@ -949,7 +838,7 @@
 	return 0;
 }
 
-static int spi_write_status_register(struct flashchip *flash, int status)
+int spi_write_status_register(struct flashchip *flash, int status)
 {
 	int ret = 1;
 
@@ -1075,128 +964,6 @@
 	return 0;
 }
 
-int spi_disable_blockprotect_at25df(struct flashchip *flash)
-{
-	uint8_t status;
-	int result;
-
-	status = spi_read_status_register();
-	/* If block protection is disabled, stop here. */
-	if ((status & (3 << 2)) == 0)
-		return 0;
-
-	msg_cdbg("Some block protection in effect, disabling\n");
-	if (status & (1 << 7)) {
-		msg_cdbg("Need to disable Sector Protection Register Lock\n");
-		if ((status & (1 << 4)) == 0) {
-			msg_cerr("WP# pin is active, disabling "
-				 "write protection is impossible.\n");
-			return 1;
-		}
-		/* All bits except bit 7 (SPRL) are readonly. */
-		result = spi_write_status_register(flash, status & ~(1 << 7));
-		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
-			return result;
-		}
-		
-	}
-	/* Global unprotect. Make sure to mask SPRL as well. */
-	result = spi_write_status_register(flash, status & ~0xbc);
-	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
-		return result;
-	}
-	status = spi_read_status_register();
-	if ((status & (3 << 2)) != 0) {
-		msg_cerr("Block protection could not be disabled!\n");
-		return 1;
-	}
-	return 0;
-}
-
-int spi_disable_blockprotect_at25df_sec(struct flashchip *flash)
-{
-	/* FIXME: We should check the security lockdown. */
-	msg_cinfo("Ignoring security lockdown (if present)\n");
-	return spi_disable_blockprotect_at25df(flash);
-}
-
-int spi_disable_blockprotect_at25f(struct flashchip *flash)
-{
-	/* spi_disable_blockprotect_at25df is not really the right way to do
-	 * this, but the side effects of said function work here as well.
-	 */
-	return spi_disable_blockprotect_at25df(flash);
-}
-
-int spi_disable_blockprotect_at25fs010(struct flashchip *flash)
-{
-	uint8_t status;
-	int result;
-
-	status = spi_read_status_register();
-	/* If block protection is disabled, stop here. */
-	if ((status & 0x6c) == 0)
-		return 0;
-
-	msg_cdbg("Some block protection in effect, disabling\n");
-	if (status & (1 << 7)) {
-		msg_cdbg("Need to disable Status Register Write Protect\n");
-		/* Clear bit 7 (WPEN). */
-		result = spi_write_status_register(flash, status & ~(1 << 7));
-		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
-			return result;
-		}
-	}
-	/* Global unprotect. Make sure to mask WPEN as well. */
-	result = spi_write_status_register(flash, status & ~0xec);
-	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
-		return result;
-	}
-	status = spi_read_status_register();
-	if ((status & 0x6c) != 0) {
-		msg_cerr("Block protection could not be disabled!\n");
-		return 1;
-	}
-	return 0;
-}
-int spi_disable_blockprotect_at25fs040(struct flashchip *flash)
-{
-	uint8_t status;
-	int result;
-
-	status = spi_read_status_register();
-	/* If block protection is disabled, stop here. */
-	if ((status & 0x7c) == 0)
-		return 0;
-
-	msg_cdbg("Some block protection in effect, disabling\n");
-	if (status & (1 << 7)) {
-		msg_cdbg("Need to disable Status Register Write Protect\n");
-		/* Clear bit 7 (WPEN). */
-		result = spi_write_status_register(flash, status & ~(1 << 7));
-		if (result) {
-			msg_cerr("spi_write_status_register failed\n");
-			return result;
-		}
-	}
-	/* Global unprotect. Make sure to mask WPEN as well. */
-	result = spi_write_status_register(flash, status & ~0xfc);
-	if (result) {
-		msg_cerr("spi_write_status_register failed\n");
-		return result;
-	}
-	status = spi_read_status_register();
-	if ((status & 0x7c) != 0) {
-		msg_cerr("Block protection could not be disabled!\n");
-		return 1;
-	}
-	return 0;
-}
-
 int spi_nbyte_read(int address, uint8_t *bytes, int len)
 {
 	const unsigned char cmd[JEDEC_READ_OUTSIZE] = {