)]}'
{
  "commit": "79d5c664cf8d53c630cfe6ebf5cae6080f4029a8",
  "tree": "a4dffc03912b5456c11b0c422676e4a35ef1919e",
  "parents": [
    "072c0802a2e61029d63bd223a30f916e845d9cf5"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.huber@secunet.com",
    "time": "Fri May 03 10:46:24 2024 +0000"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Wed Jul 22 10:48:37 2026 +0000"
  },
  "message": "chipset_enable/intel: Rework handling of what is memory mapped\n\nFilter out any bus types in `internal_buses_supported` that aren\u0027t\nmemory mapped (we can\u0027t probe these), and consolidate the unknown-\nlaptop handling for the SPI case.\n\nChange-Id: I9a9ad1c97756dfdba0ea0accb3091cd1fef2f08e\nSigned-off-by: Nico Huber \u003cnico.huber@secunet.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/404\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c7b932706aa22c10cd360278b9195aebbd0dd71a",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "2603840c14a8f371bd2218fa0473e8038a13c3a0",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}