)]}'
{
  "commit": "738fdffe4079f72e2ebd10d7d8d94f526bd86e1f",
  "tree": "2b702013808150a8829f47becd5e61e4a569400b",
  "parents": [
    "598ec58e045715e75f43b8f13732caf8cd5193e3"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Nov 18 00:43:14 2008 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Nov 18 00:43:14 2008 +0000"
  },
  "message": "ichspi: use spi_nbyte_read() instead of running the opcode directly\n\nCurrently flashrom assumes every vendor BIOS shares our view about which\nSPI opcodes should be placed in which location.\n\nMove to a less optimistic implementation and actually use the generic\nSPI read functions. They\u0027re useful for abstracting exactly this stuff\nand that makes them the preferred choice.\n\nCorresponding to flashrom svn r346 and coreboot v2 svn r3758.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "28ee578ee3292335c76d4bccb7f9df4dcd0f88fb",
      "old_mode": 33188,
      "old_path": "ichspi.c",
      "new_id": "5806ba68d999d695cccfad693bd15bd380cbb104",
      "new_mode": 33188,
      "new_path": "ichspi.c"
    }
  ]
}