amd_spi100: Add new driver for AMD SPI100 controllers
Start with a very simple PIO driver. Reads are slow this way, but
we can optimize that later. A factor of 2 is possible simply by
aligning the FIFO reads, and another factor of 3 (at least) with
memory-mapped reads.
We override the SPI speed but choose a conservative value to be
on the safe side. Flashrom only supports normal read commands,
hence we won't go over 33MHz. Also, if the firmware set a lower
speed for normal reads, we use that. We can't use dual/quad I/O
with the SPI command engine, and tests have shown that increasing
the SPI speed lifts the read speed only marginally. It seems to
be limited by the FIFO reads.
Change-Id: I403d5f103b3ae72f3a91829d562984c54c2e2d00
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72577
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/Makefile b/Makefile
index 9b853b4..bcf795b 100644
--- a/Makefile
+++ b/Makefile
@@ -577,7 +577,7 @@
ifeq ($(CONFIG_INTERNAL) $(CONFIG_INTERNAL_X86), yes yes)
FEATURE_FLAGS += -D'CONFIG_INTERNAL=1'
PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o \
- internal.o it87spi.o sb600spi.o amd_imc.o wbsio_spi.o mcp6x_spi.o \
+ internal.o it87spi.o sb600spi.o amd_imc.o amd_spi100.o wbsio_spi.o mcp6x_spi.o \
ichspi.o dmi.o known_boards.o
endif
else