tree 9feda016aaca2da0b89d55d4c2aab70dbca8f72b
parent 092a699d02a5003b323ed6df5a9e1b1241c4d620
author Nico Huber <nico.h@gmx.de> 1724583683 +0200
committer Nico Huber <nico.h@gmx.de> 1731247085 +0000

chipset_enable: Remove hidden-spidev workaround for all 14nm PCHs

When the 300 and 400 series PCH (Cannon Point, Comet Point)  support
was added, we did not know if all firmware will be consistent in the
decision not to hide the SPI PCI devices.  A few years later, we can
confirm that it is: Grepping[1] through the `linuxhw' database[2] re-
veals that we actually gain some hardware support, when matching the
SPI PCI device directly.

H410 and B460 are actually 22nm "PCH V", so they keep the workaround.

Jasper Lake already used the PCI ID of the SPI device.

Tested read/erase/write on CM246 (Cannon Point).

[1] diff -u <(git grep -lE '1f.5.*8086:(9da4|02a4|34a4|a324|06a4)' \
              | grep -v README) \
            <(git grep -lE '1f.0.*8086:(9d84|028[45]|a30[3-68-ac-e]|3482|068[457c-e]|0697)' \
              | grep -v README)
[2] https://github.com/linuxhw/LsPCI/

Change-Id: I1b490207818d3a44c8037b6d4046eefe6ead7bda
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/252