)]}'
{
  "commit": "6b44496c562b4c4be1ea32c7122904095210b33f",
  "tree": "56258d0ba9fba8ea65739f8493936b7ec5782beb",
  "parents": [
    "a502dcea3df45326898b99dc9f5f3744a776339d"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Oct 18 00:24:07 2007 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Oct 18 00:24:07 2007 +0000"
  },
  "message": "Add generic SPI flash erase and write support\n\nThe first chip the code was tested and verified with is the Macronix\nMX25L4005, but other chips should work as well. Timeouts are still\nhardcoded to data sheet maxima, but the status register checking code is\nalready there. Thanks to Harald Gutmann for the initial code on which\nthis is loosely based.\n\nCorresponding to flashrom svn r152 and coreboot v2 svn r2874.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "0e419fff66b085b8c408d81e371590506e95903e",
      "old_mode": 33188,
      "old_path": "flash.h",
      "new_id": "1fd864bd35cfd9334032354463c8855b14e52895",
      "new_mode": 33188,
      "new_path": "flash.h"
    },
    {
      "type": "modify",
      "old_id": "0c393a9f4e59123948498ca2641dc3355c36ba60",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "d1b471a2400d78c6052fa8ccb1f39075df16e1f9",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    },
    {
      "type": "modify",
      "old_id": "5dae5be73169d3bcc6e85486f9fdf5d0c3e1fb3f",
      "old_mode": 33188,
      "old_path": "spi.c",
      "new_id": "7e61b1a14eddb0943e9f1bb95f7c8b85fd81e778",
      "new_mode": 33188,
      "new_path": "spi.c"
    }
  ]
}