diff --git a/nicintel_spi.c b/nicintel_spi.c
index 531576c..d422b18 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -26,11 +26,13 @@
  */
 
 #include <stdlib.h>
+#include <unistd.h>
 #include "flash.h"
 #include "programmer.h"
 #include "hwaccess.h"
 
 #define PCI_VENDOR_ID_INTEL 0x8086
+#define MEMMAP_SIZE getpagesize()
 
 /* EEPROM/Flash Control & Data Register */
 #define EECD	0x10
@@ -157,7 +159,7 @@
 	tmp |= FLASH_WRITES_DISABLED;
 	pci_mmio_writel(tmp, nicintel_spibar + EECD);
 
-	physunmap(nicintel_spibar, 4096);
+	physunmap(nicintel_spibar, MEMMAP_SIZE);
 	pci_cleanup(pacc);
 
 	return 0;
@@ -173,7 +175,7 @@
 	io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, nics_intel_spi);
 
 	nicintel_spibar = physmap("Intel Gigabit NIC w/ SPI flash",
-				  io_base_addr, 4096);
+				  io_base_addr, MEMMAP_SIZE);
 	/* Automatic restore of EECD on shutdown is not possible because EECD
 	 * does not only contain FLASH_WRITES_DISABLED|FLASH_WRITES_ENABLED,
 	 * but other bits with side effects as well. Those other bits must be