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review.sourcearcade.org / flashprog / 4c7ea385814ef9e5db25659cfb165da78f96fa79
commit4c7ea385814ef9e5db25659cfb165da78f96fa79[log] [tgz]
authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Mon Aug 10 23:30:45 2009 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Mon Aug 10 23:30:45 2009 +0000
tree2682c30d81fd33d2c4350801eacf915ccb3aba48
parent6d5d2535a4807352bd7b60650a6c0a76a5cc6b14 [diff]
Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode settings to the debug output

This can help debug cases where the BIOS does not set up a correct flash
decode for the given flash size. The Intel docs state that the decode
applies to FWH and SPI flash.

Corresponding to flashrom svn r675.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Chris Kinney <cmkinne@sandia.gov>
1 file changed
tree: 2682c30d81fd33d2c4350801eacf915ccb3aba48
  1. 82802ab.c
  2. am29f040b.c
  3. board_enable.c
  4. cbtable.c
  5. chipset_enable.c
  6. COPYING
  7. coreboot_tables.h
  8. dummyflasher.c
  9. en29f002a.c
  10. flash.h
  11. flashchips.c
  12. flashchips.h
  13. flashrom.8
  14. flashrom.c
  15. ft2232_spi.c
  16. ichspi.c
  17. internal.c
  18. it87spi.c
  19. jedec.c
  20. layout.c
  21. m29f002.c
  22. m29f400bt.c
  23. Makefile
  24. mx29f002.c
  25. nic3com.c
  26. pcidev.c
  27. physmap.c
  28. pm29f002.c
  29. pm49fl00x.c
  30. print.c
  31. README
  32. satasii.c
  33. sb600spi.c
  34. serprog-protocol.txt
  35. serprog.c
  36. sharplhf00l04.c
  37. spi.c
  38. spi.h
  39. sst28sf040.c
  40. sst49lf040.c
  41. sst49lfxxxc.c
  42. sst_fwhub.c
  43. stm50flw0x0x.c
  44. udelay.c
  45. w29ee011.c
  46. w39v040c.c
  47. w39v080fa.c
  48. w49f002u.c
  49. wbsio_spi.c