ichspi: Add Intel Meteor Lake SoC
Hardware looks the same as C740 series / Emmitsburg. The descriptor
is somewhere between the latter and latest desktop platforms.
Output of `ich_descriptors_tool' with an image from Google/Rex looks
reasonable.
Tested probing and reading on a Lenovo L16 ThinkPad.
Documents used:
* Intel® Core™ Ultra Processor Datasheet, Volumes 1 and 2
* Meteor Lake/Arrow Lake-U / H Client Platform
SPI Programming Guide
Change-Id: I7f1d162622a141fadcad715b064f92b1ccf7c72a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/189
diff --git a/chipset_enable.c b/chipset_enable.c
index 5a89589..29032fb 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -706,6 +706,7 @@
case CHIPSET_GEMINI_LAKE:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_SNOW_RIDGE: /* hard coded to 0 (SPI) */
+ case CHIPSET_METEOR_LAKE:
boot_straps = boot_straps_apl;
break;
case CHIPSET_8_SERIES_WELLSBURG: // FIXME: check datasheet
@@ -1025,6 +1026,12 @@
return enable_flash_pch_spidev(spi_dev, name, CHIPSET_SNOW_RIDGE);
}
+static int enable_flash_mtl(struct flashprog_programmer *const prog,
+ struct pci_dev *const spi_dev, const char *const name)
+{
+ return enable_flash_pch_spidev(spi_dev, name, CHIPSET_METEOR_LAKE);
+}
+
/* Silvermont architecture: Bay Trail(-T/-I), Avoton/Rangeley.
* These have a distinctly different behavior compared to other Intel chipsets and hence are handled separately.
*
@@ -2226,6 +2233,7 @@
{0x8086, 0x7a24, ANY_REV, B_S, NT, "Intel", "Raptor Lake-S", enable_flash_pch500},
{0x8086, 0x7aa4, ANY_REV, B_S, NT, "Intel", "Alder Lake-S", enable_flash_pch500},
{0x8086, 0x18e0, ANY_REV, B_S, NT, "Intel", "Snow Ridge", enable_flash_snowridge},
+ {0x8086, 0x7e23, ANY_REV, B_S, DEP, "Intel", "Meteor Lake", enable_flash_mtl},
#endif
{0},
};
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 92be747..0f941b4 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -49,6 +49,7 @@
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_ELKHART_LAKE:
case CHIPSET_SNOW_RIDGE:
+ case CHIPSET_METEOR_LAKE:
return 16;
case CHIPSET_100_SERIES_SUNRISE_POINT:
return 10;
@@ -75,6 +76,7 @@
case CHIPSET_C620_SERIES_LEWISBURG:
case CHIPSET_C740_SERIES_EMMITSBURG:
case CHIPSET_SNOW_RIDGE:
+ case CHIPSET_METEOR_LAKE:
return 6;
case CHIPSET_APOLLO_LAKE:
case CHIPSET_GEMINI_LAKE:
@@ -129,7 +131,7 @@
"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
"C620 series Lewisburg", "300/400 series Cannon/Comet Point",
"500/600 series Tiger/Alder Point", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
- "C740 series Emmitsburg", "Snow Ridge",
+ "C740 series Emmitsburg", "Snow Ridge", "Meteor Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
cs = 0;
@@ -308,6 +310,7 @@
return freq_str[2][value];
case CHIPSET_500_SERIES_TIGER_POINT:
case CHIPSET_C740_SERIES_EMMITSBURG:
+ case CHIPSET_METEOR_LAKE:
return freq_str[3][value];
case CHIPSET_ELKHART_LAKE:
return freq_str[4][value];
@@ -349,6 +352,7 @@
msg_pdbg2("eSPI/EC Bus Clock Frequency: %s\n", freq_str[1][value]);
return;
case CHIPSET_500_SERIES_TIGER_POINT:
+ case CHIPSET_METEOR_LAKE:
msg_pdbg2("Read Clock Frequency: %s\n", "reserved");
return;
default:
@@ -437,7 +441,7 @@
{
static const char *const region_names[] = {
"Descr.", "BIOS", "ME", "GbE", "Platf.", "DevExp", "BIOS2", "unknown",
- "EC/BMC", "unknown", "IE", "10GbE/NIS", "OpROM", "iRC", "unknown", "PTT"
+ "EC/BMC", "unknown", "SSE/IE", "10GbE/NIS", "OpROM", "iRC", "unknown", "PTT"
};
if (i >= ARRAY_SIZE(region_names)) {
msg_pdbg2("%s: region index too high.\n", __func__);
@@ -555,12 +559,12 @@
prettyprint_pch100_masters(desc, nm, masters, nr, regions);
} else {
const char *const masters[] = {
- "BIOS", "ME", "GbE", "NAC", "EC", "unkn.", NULL
+ "BIOS", "ME", "GbE", "NAC", "EC", "SSE", NULL
};
const char *const regions[] = {
" FD ", "BIOS ", " ME ", " GbE ", "Pltf.",
"Reg5 ", "BIOS2", "Reg7 ", " EC ", "Reg9 ",
- "Reg10", " NIS ", "Reg12", " iRC ", "Reg14",
+ " SSE ", " NIS ", "Reg12", " iRC ", "Reg14",
" PTT ", NULL
};
prettyprint_pch100_masters(desc, nm, masters, nr, regions);
@@ -1066,10 +1070,18 @@
if (content->CSSL == 0x14) /* backwards compatible Alder Point */
return CHIPSET_500_SERIES_TIGER_POINT;
if (content->CSSL == 0x03) {
- if (content->CSSO == 0x58)
+ if (content->CSSO == 0x58) {
return CHIPSET_ELKHART_LAKE;
- else if (content->CSSO == 0x6c) /* backwards compatible Jasper Lake */
+ } else if (content->CSSO == 0x6c) { /* backwards compatible Jasper Lake */
return CHIPSET_300_SERIES_CANNON_POINT;
+ } else if (content->CSSO == 0x70) {
+ if (content->ISL == 0x82)
+ return CHIPSET_METEOR_LAKE;
+ }
+ }
+ if (content->ISL >= 0x82) {
+ warn_peculiar_desc("Meteor Lake");
+ return CHIPSET_METEOR_LAKE;
}
msg_pwarn("Unknown flash descriptor, assuming 500 series compatibility.\n");
return CHIPSET_500_SERIES_TIGER_POINT;
diff --git a/include/programmer.h b/include/programmer.h
index 4d54582..845e91a 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -368,6 +368,7 @@
CHIPSET_C740_SERIES_EMMITSBURG = CHIPSET_HAS_NEW_ACCESS_PERM,
CHIPSET_SNOW_RIDGE,
+ CHIPSET_METEOR_LAKE,
};
/* ichspi.c */
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 06ed0ae..d058988 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -139,6 +139,7 @@
"\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n"
"\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n"
"\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
+"\t- \"meteor\" for Intel's Meteor Lake SoC.\n"
"\t- \"c620\" or \"lewis\" for Intel's C620 series aka. Lewisburg chipsets.\n"
"\t- \"c740\" or \"emmits\" for Intel's C740 series chipsets.\n"
"\t- \"snow\" for Intel's Snow Ridge SoC.\n"
@@ -241,6 +242,8 @@
(strcmp(csn, "600") == 0) ||
(strcmp(csn, "alder") == 0))
cs = CHIPSET_500_SERIES_TIGER_POINT;
+ else if (strcmp(csn, "meteor") == 0)
+ cs = CHIPSET_METEOR_LAKE;
else if (strcmp(csn, "apollo") == 0)
cs = CHIPSET_APOLLO_LAKE;
else if (strcmp(csn, "gemini") == 0)