programmer: Smoothen register_spi_master() API
It was impossible to register a const struct spi_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.
Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066
Original-Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Original-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/ichspi.c b/ichspi.c
index 0996d2d..929dcc4 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -1824,7 +1824,7 @@
}
ich_init_opcodes();
ich_set_bbar(0);
- register_spi_master(&spi_master_ich7);
+ register_spi_master(&spi_master_ich7, NULL);
break;
case CHIPSET_ICH8:
default: /* Future version might behave the same */
@@ -2062,7 +2062,7 @@
register_opaque_master(&opaque_master_ich_hwseq);
} else {
- register_spi_master(&spi_master_ich9);
+ register_spi_master(&spi_master_ich9, NULL);
}
break;
}
@@ -2092,7 +2092,7 @@
/* Not sure if it speaks all these bus protocols. */
internal_buses_supported &= BUS_LPC | BUS_FWH;
ich_generation = CHIPSET_ICH7;
- register_spi_master(&spi_master_via);
+ register_spi_master(&spi_master_via, NULL);
msg_pdbg("0x00: 0x%04x (SPIS)\n", mmio_readw(ich_spibar + 0));
msg_pdbg("0x02: 0x%04x (SPIC)\n", mmio_readw(ich_spibar + 2));