Split off programmer.h from flash.h
Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
diff --git a/atahpt.c b/atahpt.c
index 6263062..3504407 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -22,6 +22,7 @@
#include <string.h>
#include <sys/types.h>
#include "flash.h"
+#include "programmer.h"
#define BIOS_ROM_ADDR 0x90
#define BIOS_ROM_DATA 0x94
diff --git a/bitbang_spi.c b/bitbang_spi.c
index b58633a..f697f5a 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -24,6 +24,7 @@
#include <ctype.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
/* Length of half a clock period in usecs. */
diff --git a/board_enable.c b/board_enable.c
index c73f389..2c9050a 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -26,6 +26,7 @@
#include <string.h>
#include "flash.h"
+#include "programmer.h"
#if defined(__i386__) || defined(__x86_64__)
/*
diff --git a/buspirate_spi.c b/buspirate_spi.c
index 55e71c2..97ce220 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -24,6 +24,7 @@
#include <ctype.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
/* Change this to #define if you want to test without a serial implementation */
diff --git a/cbtable.c b/cbtable.c
index 6a6f7a9..8f906d4 100644
--- a/cbtable.c
+++ b/cbtable.c
@@ -28,6 +28,7 @@
#include <sys/types.h>
#include <string.h>
#include "flash.h"
+#include "programmer.h"
#include "coreboot_tables.h"
char *lb_part = NULL, *lb_vendor = NULL;
diff --git a/chipset_enable.c b/chipset_enable.c
index 6254d2f..17318c2 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -32,6 +32,7 @@
#include <sys/types.h>
#include <unistd.h>
#include "flash.h"
+#include "programmer.h"
#define NOT_DONE_YET 1
diff --git a/cli_classic.c b/cli_classic.c
index a81a5a7..d78c575 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -30,6 +30,7 @@
#include <getopt.h>
#include "flash.h"
#include "flashchips.h"
+#include "programmer.h"
static void cli_classic_usage(const char *name)
{
diff --git a/dediprog.c b/dediprog.c
index 0b92983..cf4bd64 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -21,6 +21,7 @@
#include <usb.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
#define DEFAULT_TIMEOUT 3000
diff --git a/dmi.c b/dmi.c
index b42f9bf..cf459ec 100644
--- a/dmi.c
+++ b/dmi.c
@@ -23,6 +23,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
int has_dmi_support = 0;
diff --git a/drkaiser.c b/drkaiser.c
index 0d1f250..5f5e580 100644
--- a/drkaiser.c
+++ b/drkaiser.c
@@ -20,6 +20,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
#define PCI_VENDOR_ID_DRKAISER 0x1803
diff --git a/dummyflasher.c b/dummyflasher.c
index 241dcee..a356d51 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -24,6 +24,7 @@
#include <sys/types.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
static void tolower_string(char *str)
{
diff --git a/flash.h b/flash.h
index aba2380..ff84602 100644
--- a/flash.h
+++ b/flash.h
@@ -35,88 +35,7 @@
typedef unsigned long chipaddr;
-enum programmer {
-#if CONFIG_INTERNAL == 1
- PROGRAMMER_INTERNAL,
-#endif
-#if CONFIG_DUMMY == 1
- PROGRAMMER_DUMMY,
-#endif
-#if CONFIG_NIC3COM == 1
- PROGRAMMER_NIC3COM,
-#endif
-#if CONFIG_NICREALTEK == 1
- PROGRAMMER_NICREALTEK,
- PROGRAMMER_NICREALTEK2,
-#endif
-#if CONFIG_NICNATSEMI == 1
- PROGRAMMER_NICNATSEMI,
-#endif
-#if CONFIG_GFXNVIDIA == 1
- PROGRAMMER_GFXNVIDIA,
-#endif
-#if CONFIG_DRKAISER == 1
- PROGRAMMER_DRKAISER,
-#endif
-#if CONFIG_SATASII == 1
- PROGRAMMER_SATASII,
-#endif
-#if CONFIG_ATAHPT == 1
- PROGRAMMER_ATAHPT,
-#endif
-#if CONFIG_INTERNAL == 1
-#if defined(__i386__) || defined(__x86_64__)
- PROGRAMMER_IT87SPI,
-#endif
-#endif
-#if CONFIG_FT2232_SPI == 1
- PROGRAMMER_FT2232_SPI,
-#endif
-#if CONFIG_SERPROG == 1
- PROGRAMMER_SERPROG,
-#endif
-#if CONFIG_BUSPIRATE_SPI == 1
- PROGRAMMER_BUSPIRATE_SPI,
-#endif
-#if CONFIG_DEDIPROG == 1
- PROGRAMMER_DEDIPROG,
-#endif
-#if CONFIG_RAYER_SPI == 1
- PROGRAMMER_RAYER_SPI,
-#endif
- PROGRAMMER_INVALID /* This must always be the last entry. */
-};
-
-extern enum programmer programmer;
-
-struct programmer_entry {
- const char *vendor;
- const char *name;
-
- int (*init) (void);
- int (*shutdown) (void);
-
- void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
- size_t len);
- void (*unmap_flash_region) (void *virt_addr, size_t len);
-
- void (*chip_writeb) (uint8_t val, chipaddr addr);
- void (*chip_writew) (uint16_t val, chipaddr addr);
- void (*chip_writel) (uint32_t val, chipaddr addr);
- void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
- uint8_t (*chip_readb) (const chipaddr addr);
- uint16_t (*chip_readw) (const chipaddr addr);
- uint32_t (*chip_readl) (const chipaddr addr);
- void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
- void (*delay) (int usecs);
-};
-
-extern const struct programmer_entry programmer_table[];
-
int register_shutdown(void (*function) (void *data), void *data);
-
-int programmer_init(char *param);
-int programmer_shutdown(void);
void *programmer_map_flash_region(const char *descr, unsigned long phys_addr,
size_t len);
void programmer_unmap_flash_region(void *virt_addr, size_t len);
@@ -130,23 +49,6 @@
void chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
void programmer_delay(int usecs);
-enum bitbang_spi_master_type {
- BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
-#if CONFIG_RAYER_SPI == 1
- BITBANG_SPI_MASTER_RAYER,
-#endif
-};
-
-struct bitbang_spi_master {
- enum bitbang_spi_master_type type;
-
- /* Note that CS# is active low, so val=0 means the chip is active. */
- void (*set_cs) (int val);
- void (*set_sck) (int val);
- void (*set_mosi) (int val);
- int (*get_miso) (void);
-};
-
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
enum chipbustype {
@@ -263,316 +165,11 @@
extern struct flashchip flashchips[];
-#if CONFIG_INTERNAL == 1
-struct penable {
- uint16_t vendor_id;
- uint16_t device_id;
- int status;
- const char *vendor_name;
- const char *device_name;
- int (*doit) (struct pci_dev *dev, const char *name);
-};
-
-extern const struct penable chipset_enables[];
-
-struct board_pciid_enable {
- /* Any device, but make it sensible, like the ISA bridge. */
- uint16_t first_vendor;
- uint16_t first_device;
- uint16_t first_card_vendor;
- uint16_t first_card_device;
-
- /* Any device, but make it sensible, like
- * the host bridge. May be NULL.
- */
- uint16_t second_vendor;
- uint16_t second_device;
- uint16_t second_card_vendor;
- uint16_t second_card_device;
-
- /* Pattern to match DMI entries */
- const char *dmi_pattern;
-
- /* The vendor / part name from the coreboot table. */
- const char *lb_vendor;
- const char *lb_part;
-
- const char *vendor_name;
- const char *board_name;
-
- int max_rom_decode_parallel;
- int status;
- int (*enable) (void);
-};
-
-extern const struct board_pciid_enable board_pciid_enables[];
-
-struct board_info {
- const char *vendor;
- const char *name;
- const int working;
-#ifdef CONFIG_PRINT_WIKI
- const char *url;
- const char *note;
-#endif
-};
-
-extern const struct board_info boards_known[];
-extern const struct board_info laptops_known[];
-
-#endif
-
-/* udelay.c */
-void myusec_delay(int usecs);
-void myusec_calibrate_delay(void);
-void internal_delay(int usecs);
-
-#if NEED_PCI == 1
-/* pcidev.c */
-
-extern uint32_t io_base_addr;
-extern struct pci_access *pacc;
-extern struct pci_dev *pcidev_dev;
-struct pcidev_status {
- uint16_t vendor_id;
- uint16_t device_id;
- int status;
- const char *vendor_name;
- const char *device_name;
-};
-uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs);
-uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs);
-#endif
-
/* print.c */
char *flashbuses_to_text(enum chipbustype bustype);
void print_supported(void);
-#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1
-void print_supported_pcidevs(const struct pcidev_status *devs);
-#endif
void print_supported_wiki(void);
-/* board_enable.c */
-void w836xx_ext_enter(uint16_t port);
-void w836xx_ext_leave(uint16_t port);
-int it8705f_write_enable(uint8_t port);
-uint8_t sio_read(uint16_t port, uint8_t reg);
-void sio_write(uint16_t port, uint8_t reg, uint8_t data);
-void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
-int board_flash_enable(const char *vendor, const char *part);
-
-/* chipset_enable.c */
-int chipset_flash_enable(void);
-
-/* processor_enable.c */
-int processor_flash_enable(void);
-
-/* physmap.c */
-void *physmap(const char *descr, unsigned long phys_addr, size_t len);
-void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
-void physunmap(void *virt_addr, size_t len);
-int setup_cpu_msr(int cpu);
-void cleanup_cpu_msr(void);
-
-/* cbtable.c */
-void lb_vendor_dev_from_string(char *boardstring);
-int coreboot_init(void);
-extern char *lb_part, *lb_vendor;
-extern int partvendor_from_cbtable;
-
-/* dmi.c */
-extern int has_dmi_support;
-void dmi_init(void);
-int dmi_match(const char *pattern);
-
-/* internal.c */
-#if NEED_PCI == 1
-struct superio {
- uint16_t vendor;
- uint16_t port;
- uint16_t model;
-};
-extern struct superio superio;
-#define SUPERIO_VENDOR_NONE 0x0
-#define SUPERIO_VENDOR_ITE 0x1
-struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
-struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
-struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
-struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
- uint16_t card_vendor, uint16_t card_device);
-#endif
-void get_io_perms(void);
-void release_io_perms(void);
-#if CONFIG_INTERNAL == 1
-extern int is_laptop;
-extern int force_boardenable;
-extern int force_boardmismatch;
-void probe_superio(void);
-int internal_init(void);
-int internal_shutdown(void);
-void internal_chip_writeb(uint8_t val, chipaddr addr);
-void internal_chip_writew(uint16_t val, chipaddr addr);
-void internal_chip_writel(uint32_t val, chipaddr addr);
-uint8_t internal_chip_readb(const chipaddr addr);
-uint16_t internal_chip_readw(const chipaddr addr);
-uint32_t internal_chip_readl(const chipaddr addr);
-void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-#endif
-
-/* hwaccess.c */
-void mmio_writeb(uint8_t val, void *addr);
-void mmio_writew(uint16_t val, void *addr);
-void mmio_writel(uint32_t val, void *addr);
-uint8_t mmio_readb(void *addr);
-uint16_t mmio_readw(void *addr);
-uint32_t mmio_readl(void *addr);
-void mmio_le_writeb(uint8_t val, void *addr);
-void mmio_le_writew(uint16_t val, void *addr);
-void mmio_le_writel(uint32_t val, void *addr);
-uint8_t mmio_le_readb(void *addr);
-uint16_t mmio_le_readw(void *addr);
-uint32_t mmio_le_readl(void *addr);
-#define pci_mmio_writeb mmio_le_writeb
-#define pci_mmio_writew mmio_le_writew
-#define pci_mmio_writel mmio_le_writel
-#define pci_mmio_readb mmio_le_readb
-#define pci_mmio_readw mmio_le_readw
-#define pci_mmio_readl mmio_le_readl
-
-/* programmer.c */
-int noop_shutdown(void);
-void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
-void fallback_unmap(void *virt_addr, size_t len);
-uint8_t noop_chip_readb(const chipaddr addr);
-void noop_chip_writeb(uint8_t val, chipaddr addr);
-void fallback_chip_writew(uint16_t val, chipaddr addr);
-void fallback_chip_writel(uint32_t val, chipaddr addr);
-void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint16_t fallback_chip_readw(const chipaddr addr);
-uint32_t fallback_chip_readl(const chipaddr addr);
-void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-
-/* dummyflasher.c */
-#if CONFIG_DUMMY == 1
-int dummy_init(void);
-int dummy_shutdown(void);
-void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
-void dummy_unmap(void *virt_addr, size_t len);
-void dummy_chip_writeb(uint8_t val, chipaddr addr);
-void dummy_chip_writew(uint16_t val, chipaddr addr);
-void dummy_chip_writel(uint32_t val, chipaddr addr);
-void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
-uint8_t dummy_chip_readb(const chipaddr addr);
-uint16_t dummy_chip_readw(const chipaddr addr);
-uint32_t dummy_chip_readl(const chipaddr addr);
-void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-#endif
-
-/* nic3com.c */
-#if CONFIG_NIC3COM == 1
-int nic3com_init(void);
-int nic3com_shutdown(void);
-void nic3com_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nic3com_chip_readb(const chipaddr addr);
-extern const struct pcidev_status nics_3com[];
-#endif
-
-/* gfxnvidia.c */
-#if CONFIG_GFXNVIDIA == 1
-int gfxnvidia_init(void);
-int gfxnvidia_shutdown(void);
-void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t gfxnvidia_chip_readb(const chipaddr addr);
-extern const struct pcidev_status gfx_nvidia[];
-#endif
-
-/* drkaiser.c */
-#if CONFIG_DRKAISER == 1
-int drkaiser_init(void);
-int drkaiser_shutdown(void);
-void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t drkaiser_chip_readb(const chipaddr addr);
-extern const struct pcidev_status drkaiser_pcidev[];
-#endif
-
-/* nicrealtek.c */
-#if CONFIG_NICREALTEK == 1
-int nicrealtek_init(void);
-int nicsmc1211_init(void);
-int nicrealtek_shutdown(void);
-void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicrealtek_chip_readb(const chipaddr addr);
-extern const struct pcidev_status nics_realtek[];
-extern const struct pcidev_status nics_realteksmc1211[];
-#endif
-
-/* nicnatsemi.c */
-#if CONFIG_NICNATSEMI == 1
-int nicnatsemi_init(void);
-int nicnatsemi_shutdown(void);
-void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t nicnatsemi_chip_readb(const chipaddr addr);
-extern const struct pcidev_status nics_natsemi[];
-#endif
-
-/* satasii.c */
-#if CONFIG_SATASII == 1
-int satasii_init(void);
-int satasii_shutdown(void);
-void satasii_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t satasii_chip_readb(const chipaddr addr);
-extern const struct pcidev_status satas_sii[];
-#endif
-
-/* atahpt.c */
-#if CONFIG_ATAHPT == 1
-int atahpt_init(void);
-int atahpt_shutdown(void);
-void atahpt_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t atahpt_chip_readb(const chipaddr addr);
-extern const struct pcidev_status ata_hpt[];
-#endif
-
-/* ft2232_spi.c */
-#define FTDI_FT2232H 0x6010
-#define FTDI_FT4232H 0x6011
-int ft2232_spi_init(void);
-int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
-int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-
-/* rayer_spi.c */
-#if CONFIG_RAYER_SPI == 1
-int rayer_spi_init(void);
-#endif
-
-/* bitbang_spi.c */
-int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
-int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
-int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-
-/* buspirate_spi.c */
-struct buspirate_spispeeds {
- const char *name;
- const int speed;
-};
-int buspirate_spi_init(void);
-int buspirate_spi_shutdown(void);
-int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
-int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-
-/* dediprog.c */
-int dediprog_init(void);
-int dediprog_shutdown(void);
-int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
-int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-
/* flashrom.c */
enum write_granularity {
write_gran_1bit,
@@ -580,15 +177,6 @@
write_gran_256bytes,
};
extern enum chipbustype buses_supported;
-struct decode_sizes {
- uint32_t parallel;
- uint32_t lpc;
- uint32_t fwh;
- uint32_t spi;
-};
-extern struct decode_sizes max_rom_decode;
-extern int programmer_may_write;
-extern unsigned long flashbase;
extern int verbose;
extern const char * const flashrom_version;
extern char *chip_to_probe;
@@ -597,12 +185,9 @@
int erase_flash(struct flashchip *flash);
struct flashchip *probe_flash(struct flashchip *first_flash, int force);
int read_flash_to_file(struct flashchip *flash, char *filename);
-void check_chip_supported(struct flashchip *flash);
-int check_max_decode(enum chipbustype buses, uint32_t size);
int min(int a, int b);
int max(int a, int b);
char *extract_param(char **haystack, char *needle, char *delim);
-char *extract_programmer_param(char *param_name);
int check_erased_range(struct flashchip *flash, int start, int len);
int verify_range(struct flashchip *flash, uint8_t *cmpbuf, int start, int len, char *message);
int need_erase(uint8_t *have, uint8_t *want, int len, enum write_granularity gran);
@@ -642,130 +227,20 @@
int cli_classic(int argc, char *argv[]);
/* layout.c */
-int show_id(uint8_t *bios, int size, int force);
int read_romlayout(char *name);
int find_romentry(char *name);
int handle_romentries(uint8_t *buffer, struct flashchip *flash);
/* spi.c */
-enum spi_controller {
- SPI_CONTROLLER_NONE,
-#if CONFIG_INTERNAL == 1
-#if defined(__i386__) || defined(__x86_64__)
- SPI_CONTROLLER_ICH7,
- SPI_CONTROLLER_ICH9,
- SPI_CONTROLLER_IT87XX,
- SPI_CONTROLLER_SB600,
- SPI_CONTROLLER_VIA,
- SPI_CONTROLLER_WBSIO,
-#endif
-#endif
-#if CONFIG_FT2232_SPI == 1
- SPI_CONTROLLER_FT2232,
-#endif
-#if CONFIG_DUMMY == 1
- SPI_CONTROLLER_DUMMY,
-#endif
-#if CONFIG_BUSPIRATE_SPI == 1
- SPI_CONTROLLER_BUSPIRATE,
-#endif
-#if CONFIG_DEDIPROG == 1
- SPI_CONTROLLER_DEDIPROG,
-#endif
-#if CONFIG_RAYER_SPI == 1
- SPI_CONTROLLER_RAYER,
-#endif
- SPI_CONTROLLER_INVALID /* This must always be the last entry. */
-};
-extern const int spi_programmer_count;
struct spi_command {
unsigned int writecnt;
unsigned int readcnt;
const unsigned char *writearr;
unsigned char *readarr;
};
-struct spi_programmer {
- int (*command)(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
- int (*multicommand)(struct spi_command *cmds);
-
- /* Optimized functions for this programmer */
- int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
- int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len);
-};
-
-extern enum spi_controller spi_controller;
-extern const struct spi_programmer spi_programmer[];
int spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int spi_send_multicommand(struct spi_command *cmds);
-int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int default_spi_send_multicommand(struct spi_command *cmds);
uint32_t spi_get_valid_read_addr(void);
-/* ichspi.c */
-#if CONFIG_INTERNAL == 1
-extern uint32_t ichspi_bbar;
-int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
- int ich_generation);
-int via_init_spi(struct pci_dev *dev);
-int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len);
-int ich_spi_send_multicommand(struct spi_command *cmds);
-#endif
-
-/* it87spi.c */
-void enter_conf_mode_ite(uint16_t port);
-void exit_conf_mode_ite(uint16_t port);
-struct superio probe_superio_ite(void);
-int init_superio_ite(void);
-int it87spi_init(void);
-int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-
-/* sb600spi.c */
-#if CONFIG_INTERNAL == 1
-int sb600_probe_spi(struct pci_dev *dev);
-int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
-#endif
-
-/* wbsio_spi.c */
-#if CONFIG_INTERNAL == 1
-int wbsio_check_for_spi(void);
-int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
- const unsigned char *writearr, unsigned char *readarr);
-int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
-#endif
-
-/* serprog.c */
-int serprog_init(void);
-int serprog_shutdown(void);
-void serprog_chip_writeb(uint8_t val, chipaddr addr);
-uint8_t serprog_chip_readb(const chipaddr addr);
-void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
-void serprog_delay(int delay);
-
-/* serial.c */
-#if _WIN32
-typedef HANDLE fdtype;
-#else
-typedef int fdtype;
-#endif
-
-void sp_flush_incoming(void);
-fdtype sp_openserport(char *dev, unsigned int baud);
-void __attribute__((noreturn)) sp_die(char *msg);
-extern fdtype sp_fd;
-int serialport_shutdown(void);
-int serialport_write(unsigned char *buf, unsigned int writecnt);
-int serialport_read(unsigned char *buf, unsigned int readcnt);
-
#endif /* !__FLASH_H__ */
diff --git a/flashrom.c b/flashrom.c
index a510f61..2690151 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -33,6 +33,7 @@
#endif
#include "flash.h"
#include "flashchips.h"
+#include "programmer.h"
const char * const flashrom_version = FLASHROM_VERSION;
char *chip_to_probe = NULL;
diff --git a/ft2232_spi.c b/ft2232_spi.c
index c8711e9..25006fb 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -27,6 +27,7 @@
#include <ctype.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
#include <ftdi.h>
diff --git a/gfxnvidia.c b/gfxnvidia.c
index 252ddc5..212f5b9 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -22,6 +22,7 @@
#include <string.h>
#include <sys/types.h>
#include "flash.h"
+#include "programmer.h"
#define PCI_VENDOR_ID_NVIDIA 0x10de
diff --git a/ichspi.c b/ichspi.c
index 88e993d..126ed00 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -38,6 +38,7 @@
#include <string.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
/* ICH9 controller register definition */
diff --git a/internal.c b/internal.c
index f99a4cc..8b19692 100644
--- a/internal.c
+++ b/internal.c
@@ -23,6 +23,7 @@
#include <stdlib.h>
#include <sys/types.h>
#include "flash.h"
+#include "programmer.h"
#if NEED_PCI == 1
struct pci_dev *pci_dev_find_filter(struct pci_filter filter)
diff --git a/it87spi.c b/it87spi.c
index cf3d3b9..ed6bae5 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -29,6 +29,7 @@
#include <stdlib.h>
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
#define ITE_SUPERIO_PORT1 0x2e
diff --git a/layout.c b/layout.c
index 5ee667e..d65e370 100644
--- a/layout.c
+++ b/layout.c
@@ -23,6 +23,7 @@
#include <string.h>
#include <ctype.h>
#include "flash.h"
+#include "programmer.h"
#if CONFIG_INTERNAL == 1
char *mainboard_vendor = NULL;
diff --git a/nic3com.c b/nic3com.c
index 381ccf4..0eb781a 100644
--- a/nic3com.c
+++ b/nic3com.c
@@ -22,6 +22,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
#define BIOS_ROM_ADDR 0x04
#define BIOS_ROM_DATA 0x08
diff --git a/nicnatsemi.c b/nicnatsemi.c
index 89a0bf4..193a86e 100644
--- a/nicnatsemi.c
+++ b/nicnatsemi.c
@@ -22,6 +22,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
#define PCI_VENDOR_ID_NATSEMI 0x100b
diff --git a/nicrealtek.c b/nicrealtek.c
index 38f5465..c32e5d6 100644
--- a/nicrealtek.c
+++ b/nicrealtek.c
@@ -22,6 +22,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
#define PCI_VENDOR_ID_REALTEK 0x10ec
#define PCI_VENDOR_ID_SMC1211 0x1113
diff --git a/pcidev.c b/pcidev.c
index cc08a65..f7048e7 100644
--- a/pcidev.c
+++ b/pcidev.c
@@ -22,6 +22,7 @@
#include <string.h>
#include <sys/types.h>
#include "flash.h"
+#include "programmer.h"
uint32_t io_base_addr;
struct pci_access *pacc;
diff --git a/print.c b/print.c
index 88bc7bd..14aa489 100644
--- a/print.c
+++ b/print.c
@@ -24,6 +24,7 @@
#include <stdlib.h>
#include "flash.h"
#include "flashchips.h"
+#include "programmer.h"
/*
* Return a string corresponding to the bustype parameter.
diff --git a/print_wiki.c b/print_wiki.c
index 8c0e06d..3f13510 100644
--- a/print_wiki.c
+++ b/print_wiki.c
@@ -25,6 +25,7 @@
#include <time.h>
#include "flash.h"
#include "flashchips.h"
+#include "programmer.h"
static const char * const wiki_header = "= Supported devices =\n\n\
<div style=\"margin-top:0.5em; padding:0.5em 0.5em 0.5em 0.5em; \
diff --git a/processor_enable.c b/processor_enable.c
index 6623bb7..245975e 100644
--- a/processor_enable.c
+++ b/processor_enable.c
@@ -22,6 +22,7 @@
*/
#include "flash.h"
+#include "programmer.h"
#if defined(__i386__) || defined(__x86_64__)
diff --git a/programmer.h b/programmer.h
new file mode 100644
index 0000000..68ad500
--- /dev/null
+++ b/programmer.h
@@ -0,0 +1,558 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2000 Silicon Integrated System Corporation
+ * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
+ * Copyright (C) 2005-2009 coresystems GmbH
+ * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __PROGRAMMER_H__
+#define __PROGRAMMER_H__ 1
+
+enum programmer {
+#if CONFIG_INTERNAL == 1
+ PROGRAMMER_INTERNAL,
+#endif
+#if CONFIG_DUMMY == 1
+ PROGRAMMER_DUMMY,
+#endif
+#if CONFIG_NIC3COM == 1
+ PROGRAMMER_NIC3COM,
+#endif
+#if CONFIG_NICREALTEK == 1
+ PROGRAMMER_NICREALTEK,
+ PROGRAMMER_NICREALTEK2,
+#endif
+#if CONFIG_NICNATSEMI == 1
+ PROGRAMMER_NICNATSEMI,
+#endif
+#if CONFIG_GFXNVIDIA == 1
+ PROGRAMMER_GFXNVIDIA,
+#endif
+#if CONFIG_DRKAISER == 1
+ PROGRAMMER_DRKAISER,
+#endif
+#if CONFIG_SATASII == 1
+ PROGRAMMER_SATASII,
+#endif
+#if CONFIG_ATAHPT == 1
+ PROGRAMMER_ATAHPT,
+#endif
+#if CONFIG_INTERNAL == 1
+#if defined(__i386__) || defined(__x86_64__)
+ PROGRAMMER_IT87SPI,
+#endif
+#endif
+#if CONFIG_FT2232_SPI == 1
+ PROGRAMMER_FT2232_SPI,
+#endif
+#if CONFIG_SERPROG == 1
+ PROGRAMMER_SERPROG,
+#endif
+#if CONFIG_BUSPIRATE_SPI == 1
+ PROGRAMMER_BUSPIRATE_SPI,
+#endif
+#if CONFIG_DEDIPROG == 1
+ PROGRAMMER_DEDIPROG,
+#endif
+#if CONFIG_RAYER_SPI == 1
+ PROGRAMMER_RAYER_SPI,
+#endif
+ PROGRAMMER_INVALID /* This must always be the last entry. */
+};
+
+extern enum programmer programmer;
+
+struct programmer_entry {
+ const char *vendor;
+ const char *name;
+
+ int (*init) (void);
+ int (*shutdown) (void);
+
+ void * (*map_flash_region) (const char *descr, unsigned long phys_addr,
+ size_t len);
+ void (*unmap_flash_region) (void *virt_addr, size_t len);
+
+ void (*chip_writeb) (uint8_t val, chipaddr addr);
+ void (*chip_writew) (uint16_t val, chipaddr addr);
+ void (*chip_writel) (uint32_t val, chipaddr addr);
+ void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len);
+ uint8_t (*chip_readb) (const chipaddr addr);
+ uint16_t (*chip_readw) (const chipaddr addr);
+ uint32_t (*chip_readl) (const chipaddr addr);
+ void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len);
+ void (*delay) (int usecs);
+};
+
+extern const struct programmer_entry programmer_table[];
+
+int programmer_init(char *param);
+int programmer_shutdown(void);
+
+enum bitbang_spi_master_type {
+ BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */
+#if CONFIG_RAYER_SPI == 1
+ BITBANG_SPI_MASTER_RAYER,
+#endif
+};
+
+struct bitbang_spi_master {
+ enum bitbang_spi_master_type type;
+
+ /* Note that CS# is active low, so val=0 means the chip is active. */
+ void (*set_cs) (int val);
+ void (*set_sck) (int val);
+ void (*set_mosi) (int val);
+ int (*get_miso) (void);
+};
+
+#if CONFIG_INTERNAL == 1
+struct penable {
+ uint16_t vendor_id;
+ uint16_t device_id;
+ int status;
+ const char *vendor_name;
+ const char *device_name;
+ int (*doit) (struct pci_dev *dev, const char *name);
+};
+
+extern const struct penable chipset_enables[];
+
+struct board_pciid_enable {
+ /* Any device, but make it sensible, like the ISA bridge. */
+ uint16_t first_vendor;
+ uint16_t first_device;
+ uint16_t first_card_vendor;
+ uint16_t first_card_device;
+
+ /* Any device, but make it sensible, like
+ * the host bridge. May be NULL.
+ */
+ uint16_t second_vendor;
+ uint16_t second_device;
+ uint16_t second_card_vendor;
+ uint16_t second_card_device;
+
+ /* Pattern to match DMI entries */
+ const char *dmi_pattern;
+
+ /* The vendor / part name from the coreboot table. */
+ const char *lb_vendor;
+ const char *lb_part;
+
+ const char *vendor_name;
+ const char *board_name;
+
+ int max_rom_decode_parallel;
+ int status;
+ int (*enable) (void);
+};
+
+extern const struct board_pciid_enable board_pciid_enables[];
+
+struct board_info {
+ const char *vendor;
+ const char *name;
+ const int working;
+#ifdef CONFIG_PRINT_WIKI
+ const char *url;
+ const char *note;
+#endif
+};
+
+extern const struct board_info boards_known[];
+extern const struct board_info laptops_known[];
+#endif
+
+/* udelay.c */
+void myusec_delay(int usecs);
+void myusec_calibrate_delay(void);
+void internal_delay(int usecs);
+
+#if NEED_PCI == 1
+/* pcidev.c */
+extern uint32_t io_base_addr;
+extern struct pci_access *pacc;
+extern struct pci_dev *pcidev_dev;
+struct pcidev_status {
+ uint16_t vendor_id;
+ uint16_t device_id;
+ int status;
+ const char *vendor_name;
+ const char *device_name;
+};
+uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs);
+uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs);
+#endif
+
+/* print.c */
+#if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT >= 1
+void print_supported_pcidevs(const struct pcidev_status *devs);
+#endif
+
+/* board_enable.c */
+void w836xx_ext_enter(uint16_t port);
+void w836xx_ext_leave(uint16_t port);
+int it8705f_write_enable(uint8_t port);
+uint8_t sio_read(uint16_t port, uint8_t reg);
+void sio_write(uint16_t port, uint8_t reg, uint8_t data);
+void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask);
+int board_flash_enable(const char *vendor, const char *part);
+
+/* chipset_enable.c */
+int chipset_flash_enable(void);
+
+/* processor_enable.c */
+int processor_flash_enable(void);
+
+/* physmap.c */
+void *physmap(const char *descr, unsigned long phys_addr, size_t len);
+void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len);
+void physunmap(void *virt_addr, size_t len);
+int setup_cpu_msr(int cpu);
+void cleanup_cpu_msr(void);
+
+/* cbtable.c */
+void lb_vendor_dev_from_string(char *boardstring);
+int coreboot_init(void);
+extern char *lb_part, *lb_vendor;
+extern int partvendor_from_cbtable;
+
+/* dmi.c */
+extern int has_dmi_support;
+void dmi_init(void);
+int dmi_match(const char *pattern);
+
+/* internal.c */
+#if NEED_PCI == 1
+struct superio {
+ uint16_t vendor;
+ uint16_t port;
+ uint16_t model;
+};
+extern struct superio superio;
+#define SUPERIO_VENDOR_NONE 0x0
+#define SUPERIO_VENDOR_ITE 0x1
+struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
+struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class);
+struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device);
+struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,
+ uint16_t card_vendor, uint16_t card_device);
+#endif
+void get_io_perms(void);
+void release_io_perms(void);
+#if CONFIG_INTERNAL == 1
+extern int is_laptop;
+extern int force_boardenable;
+extern int force_boardmismatch;
+void probe_superio(void);
+int internal_init(void);
+int internal_shutdown(void);
+void internal_chip_writeb(uint8_t val, chipaddr addr);
+void internal_chip_writew(uint16_t val, chipaddr addr);
+void internal_chip_writel(uint32_t val, chipaddr addr);
+uint8_t internal_chip_readb(const chipaddr addr);
+uint16_t internal_chip_readw(const chipaddr addr);
+uint32_t internal_chip_readl(const chipaddr addr);
+void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
+#endif
+
+/* hwaccess.c */
+void mmio_writeb(uint8_t val, void *addr);
+void mmio_writew(uint16_t val, void *addr);
+void mmio_writel(uint32_t val, void *addr);
+uint8_t mmio_readb(void *addr);
+uint16_t mmio_readw(void *addr);
+uint32_t mmio_readl(void *addr);
+void mmio_le_writeb(uint8_t val, void *addr);
+void mmio_le_writew(uint16_t val, void *addr);
+void mmio_le_writel(uint32_t val, void *addr);
+uint8_t mmio_le_readb(void *addr);
+uint16_t mmio_le_readw(void *addr);
+uint32_t mmio_le_readl(void *addr);
+#define pci_mmio_writeb mmio_le_writeb
+#define pci_mmio_writew mmio_le_writew
+#define pci_mmio_writel mmio_le_writel
+#define pci_mmio_readb mmio_le_readb
+#define pci_mmio_readw mmio_le_readw
+#define pci_mmio_readl mmio_le_readl
+
+/* programmer.c */
+int noop_shutdown(void);
+void *fallback_map(const char *descr, unsigned long phys_addr, size_t len);
+void fallback_unmap(void *virt_addr, size_t len);
+uint8_t noop_chip_readb(const chipaddr addr);
+void noop_chip_writeb(uint8_t val, chipaddr addr);
+void fallback_chip_writew(uint16_t val, chipaddr addr);
+void fallback_chip_writel(uint32_t val, chipaddr addr);
+void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
+uint16_t fallback_chip_readw(const chipaddr addr);
+uint32_t fallback_chip_readl(const chipaddr addr);
+void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
+
+/* dummyflasher.c */
+#if CONFIG_DUMMY == 1
+int dummy_init(void);
+int dummy_shutdown(void);
+void *dummy_map(const char *descr, unsigned long phys_addr, size_t len);
+void dummy_unmap(void *virt_addr, size_t len);
+void dummy_chip_writeb(uint8_t val, chipaddr addr);
+void dummy_chip_writew(uint16_t val, chipaddr addr);
+void dummy_chip_writel(uint32_t val, chipaddr addr);
+void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len);
+uint8_t dummy_chip_readb(const chipaddr addr);
+uint16_t dummy_chip_readw(const chipaddr addr);
+uint32_t dummy_chip_readl(const chipaddr addr);
+void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
+int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int dummy_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int dummy_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+#endif
+
+/* nic3com.c */
+#if CONFIG_NIC3COM == 1
+int nic3com_init(void);
+int nic3com_shutdown(void);
+void nic3com_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t nic3com_chip_readb(const chipaddr addr);
+extern const struct pcidev_status nics_3com[];
+#endif
+
+/* gfxnvidia.c */
+#if CONFIG_GFXNVIDIA == 1
+int gfxnvidia_init(void);
+int gfxnvidia_shutdown(void);
+void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t gfxnvidia_chip_readb(const chipaddr addr);
+extern const struct pcidev_status gfx_nvidia[];
+#endif
+
+/* drkaiser.c */
+#if CONFIG_DRKAISER == 1
+int drkaiser_init(void);
+int drkaiser_shutdown(void);
+void drkaiser_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t drkaiser_chip_readb(const chipaddr addr);
+extern const struct pcidev_status drkaiser_pcidev[];
+#endif
+
+/* nicrealtek.c */
+#if CONFIG_NICREALTEK == 1
+int nicrealtek_init(void);
+int nicsmc1211_init(void);
+int nicrealtek_shutdown(void);
+void nicrealtek_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t nicrealtek_chip_readb(const chipaddr addr);
+extern const struct pcidev_status nics_realtek[];
+extern const struct pcidev_status nics_realteksmc1211[];
+#endif
+
+/* nicnatsemi.c */
+#if CONFIG_NICNATSEMI == 1
+int nicnatsemi_init(void);
+int nicnatsemi_shutdown(void);
+void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t nicnatsemi_chip_readb(const chipaddr addr);
+extern const struct pcidev_status nics_natsemi[];
+#endif
+
+/* satasii.c */
+#if CONFIG_SATASII == 1
+int satasii_init(void);
+int satasii_shutdown(void);
+void satasii_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t satasii_chip_readb(const chipaddr addr);
+extern const struct pcidev_status satas_sii[];
+#endif
+
+/* atahpt.c */
+#if CONFIG_ATAHPT == 1
+int atahpt_init(void);
+int atahpt_shutdown(void);
+void atahpt_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t atahpt_chip_readb(const chipaddr addr);
+extern const struct pcidev_status ata_hpt[];
+#endif
+
+/* ft2232_spi.c */
+#define FTDI_FT2232H 0x6010
+#define FTDI_FT4232H 0x6011
+int ft2232_spi_init(void);
+int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* rayer_spi.c */
+#if CONFIG_RAYER_SPI == 1
+int rayer_spi_init(void);
+#endif
+
+/* bitbang_spi.c */
+int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod);
+int bitbang_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int bitbang_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int bitbang_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* buspirate_spi.c */
+struct buspirate_spispeeds {
+ const char *name;
+ const int speed;
+};
+int buspirate_spi_init(void);
+int buspirate_spi_shutdown(void);
+int buspirate_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int buspirate_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int buspirate_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* dediprog.c */
+int dediprog_init(void);
+int dediprog_shutdown(void);
+int dediprog_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
+int dediprog_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* flashrom.c */
+struct decode_sizes {
+ uint32_t parallel;
+ uint32_t lpc;
+ uint32_t fwh;
+ uint32_t spi;
+};
+extern struct decode_sizes max_rom_decode;
+extern int programmer_may_write;
+extern unsigned long flashbase;
+void check_chip_supported(struct flashchip *flash);
+int check_max_decode(enum chipbustype buses, uint32_t size);
+char *extract_programmer_param(char *param_name);
+
+/* layout.c */
+int show_id(uint8_t *bios, int size, int force);
+
+/* spi.c */
+enum spi_controller {
+ SPI_CONTROLLER_NONE,
+#if CONFIG_INTERNAL == 1
+#if defined(__i386__) || defined(__x86_64__)
+ SPI_CONTROLLER_ICH7,
+ SPI_CONTROLLER_ICH9,
+ SPI_CONTROLLER_IT87XX,
+ SPI_CONTROLLER_SB600,
+ SPI_CONTROLLER_VIA,
+ SPI_CONTROLLER_WBSIO,
+#endif
+#endif
+#if CONFIG_FT2232_SPI == 1
+ SPI_CONTROLLER_FT2232,
+#endif
+#if CONFIG_DUMMY == 1
+ SPI_CONTROLLER_DUMMY,
+#endif
+#if CONFIG_BUSPIRATE_SPI == 1
+ SPI_CONTROLLER_BUSPIRATE,
+#endif
+#if CONFIG_DEDIPROG == 1
+ SPI_CONTROLLER_DEDIPROG,
+#endif
+#if CONFIG_RAYER_SPI == 1
+ SPI_CONTROLLER_RAYER,
+#endif
+ SPI_CONTROLLER_INVALID /* This must always be the last entry. */
+};
+extern const int spi_programmer_count;
+struct spi_programmer {
+ int (*command)(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+ int (*multicommand)(struct spi_command *cmds);
+
+ /* Optimized functions for this programmer */
+ int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len);
+ int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len);
+};
+
+extern enum spi_controller spi_controller;
+extern const struct spi_programmer spi_programmer[];
+int default_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int default_spi_send_multicommand(struct spi_command *cmds);
+
+/* ichspi.c */
+#if CONFIG_INTERNAL == 1
+extern uint32_t ichspi_bbar;
+int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb,
+ int ich_generation);
+int via_init_spi(struct pci_dev *dev);
+int ich_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int ich_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int ich_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int len);
+int ich_spi_send_multicommand(struct spi_command *cmds);
+#endif
+
+/* it87spi.c */
+void enter_conf_mode_ite(uint16_t port);
+void exit_conf_mode_ite(uint16_t port);
+struct superio probe_superio_ite(void);
+int init_superio_ite(void);
+int it87spi_init(void);
+int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int it8716f_spi_chip_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+
+/* sb600spi.c */
+#if CONFIG_INTERNAL == 1
+int sb600_probe_spi(struct pci_dev *dev);
+int sb600_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int sb600_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+int sb600_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len);
+#endif
+
+/* wbsio_spi.c */
+#if CONFIG_INTERNAL == 1
+int wbsio_check_for_spi(void);
+int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
+ const unsigned char *writearr, unsigned char *readarr);
+int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len);
+#endif
+
+/* serprog.c */
+int serprog_init(void);
+int serprog_shutdown(void);
+void serprog_chip_writeb(uint8_t val, chipaddr addr);
+uint8_t serprog_chip_readb(const chipaddr addr);
+void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len);
+void serprog_delay(int delay);
+
+/* serial.c */
+#if _WIN32
+typedef HANDLE fdtype;
+#else
+typedef int fdtype;
+#endif
+
+void sp_flush_incoming(void);
+fdtype sp_openserport(char *dev, unsigned int baud);
+void __attribute__((noreturn)) sp_die(char *msg);
+extern fdtype sp_fd;
+int serialport_shutdown(void);
+int serialport_write(unsigned char *buf, unsigned int writecnt);
+int serialport_read(unsigned char *buf, unsigned int readcnt);
+
+#endif /* !__PROGRAMMER_H__ */
diff --git a/rayer_spi.c b/rayer_spi.c
index 37cf752..722ad14 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -31,6 +31,7 @@
#if defined(__i386__) || defined(__x86_64__)
#include "flash.h"
+#include "programmer.h"
/* We have two sets of pins, out and in. The numbers for both sets are
* independent and are bitshift values, not real pin numbers.
diff --git a/satasii.c b/satasii.c
index 4e1df81..19eae05 100644
--- a/satasii.c
+++ b/satasii.c
@@ -22,6 +22,7 @@
#include <stdlib.h>
#include "flash.h"
+#include "programmer.h"
#define PCI_VENDOR_ID_SII 0x1095
diff --git a/sb600spi.c b/sb600spi.c
index 3efdd5d..ca493a8 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -25,6 +25,7 @@
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
/* This struct is unused, but helps visualize the SB600 SPI BAR layout.
diff --git a/serial.c b/serial.c
index 37f2549..caf9389 100644
--- a/serial.c
+++ b/serial.c
@@ -22,7 +22,6 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
-#include "flash.h"
#include <string.h>
#include <ctype.h>
#include <fcntl.h>
@@ -35,6 +34,8 @@
#else
#include <termios.h>
#endif
+#include "flash.h"
+#include "programmer.h"
fdtype sp_fd;
diff --git a/serprog.c b/serprog.c
index b1c4cef..8354f54 100644
--- a/serprog.c
+++ b/serprog.c
@@ -22,7 +22,6 @@
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
-#include "flash.h"
#include <string.h>
#include <ctype.h>
#include <fcntl.h>
@@ -36,6 +35,8 @@
#include <errno.h>
#include <inttypes.h>
#include <termios.h>
+#include "flash.h"
+#include "programmer.h"
#define MSGHEADER "serprog:"
diff --git a/spi.c b/spi.c
index 1efdae0..65d43be 100644
--- a/spi.c
+++ b/spi.c
@@ -25,6 +25,7 @@
#include "flash.h"
#include "flashchips.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
enum spi_controller spi_controller = SPI_CONTROLLER_NONE;
diff --git a/spi25.c b/spi25.c
index b8b26bd..562effa 100644
--- a/spi25.c
+++ b/spi25.c
@@ -26,6 +26,7 @@
#include "flash.h"
#include "flashchips.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
void spi_prettyprint_status_register(struct flashchip *flash);
diff --git a/wbsio_spi.c b/wbsio_spi.c
index b8f8b38..acf9cb2 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -22,6 +22,7 @@
#include "flash.h"
#include "chipdrivers.h"
+#include "programmer.h"
#include "spi.h"
#define WBSIO_PORT1 0x2e