)]}'
{
  "commit": "57dbd64b33143964bb8eb91d33d72a2147f0091c",
  "tree": "1606d103406bf36144602971ca2ac970d3a61482",
  "parents": [
    "3eb5a8c82c00769bffc95c2c6c479de6d20dbd09"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Tue Mar 13 18:01:05 2018 +0100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Wed Oct 03 13:10:17 2018 +0000"
  },
  "message": "flashchips: Add Spansion 25FL256S......0\n\nThe Spansion 25SFL256S supports 4BA through an extended address register,\na 4BA mode set by bit 7 of that register, or native 4BA instructions.\nEnable the former only for now.\n\nUnfortunately the S25SF256S uses another instruction to write the exten-\nded address register. So we add an override for the instruction byte.\n\nChange-Id: I0a95a81dfe86434f049215ebd8477392391b9efc\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: Michael Fuckner \u003cmichael@fuckner.net\u003e\nReviewed-on: https://review.coreboot.org/25132\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: David Hendricks \u003cdavid.hendricks@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "01ff5cd6ccc52df026ee9150233c90f2916ba34d",
      "old_mode": 33188,
      "old_path": "flash.h",
      "new_id": "8eb8a7bf7db69498333c23e18127c957739745cb",
      "new_mode": 33188,
      "new_path": "flash.h"
    },
    {
      "type": "modify",
      "old_id": "054ca7a9d744daade411b7ac533c6aad1f9b58e9",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "7853849230544e26b53edc1d3c860ae828cfdc59",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    },
    {
      "type": "modify",
      "old_id": "c403570afc1b4afcf2f5bfc8b37180b8fec6223c",
      "old_mode": 33188,
      "old_path": "spi25.c",
      "new_id": "3b5e50ea42d130e56eae86342612c686723a426e",
      "new_mode": 33188,
      "new_path": "spi25.c"
    }
  ]
}