diff --git a/a25.c b/a25.c
index 8c38f87..2264157 100644
--- a/a25.c
+++ b/a25.c
@@ -23,12 +23,6 @@
 
 /* Prettyprint the status register. Works for AMIC A25L series. */
 
-static void spi_prettyprint_status_register_amic_a25_srwd(uint8_t status)
-{
-	msg_cdbg("Chip status register: Status Register Write Disable "
-		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
-}
-
 int spi_prettyprint_status_register_amic_a25l05p(struct flashctx *flash)
 {
 	uint8_t status;
@@ -36,7 +30,7 @@
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	spi_prettyprint_status_register_amic_a25_srwd(status);
+	spi_prettyprint_status_register_srwd(status);
 	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_bit(status, 5);
 	spi_prettyprint_status_register_bit(status, 4);
@@ -52,7 +46,7 @@
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	spi_prettyprint_status_register_amic_a25_srwd(status);
+	spi_prettyprint_status_register_srwd(status);
 	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_bit(status, 5);
 	spi_prettyprint_status_register_bp(status, 2);
@@ -67,7 +61,7 @@
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	spi_prettyprint_status_register_amic_a25_srwd(status);
+	spi_prettyprint_status_register_srwd(status);
 	msg_cdbg("Chip status register: Sector Protect Size (SEC) "
 		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
 	msg_cdbg("Chip status register: Top/Bottom (TB) "
@@ -85,7 +79,7 @@
 	status = spi_read_status_register(flash);
 	msg_cdbg("Chip status register is %02x\n", status);
 
-	spi_prettyprint_status_register_amic_a25_srwd(status);
+	spi_prettyprint_status_register_srwd(status);
 	msg_cdbg("Chip status register: Sector Protect Size (SEC) "
 		 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
 	msg_cdbg("Chip status register: Top/Bottom (TB) "
diff --git a/chipdrivers.h b/chipdrivers.h
index ea6c35f..1ef4959 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -53,6 +53,7 @@
 int spi_write_status_register(struct flashctx *flash, int status);
 void spi_prettyprint_status_register_bit(uint8_t status, int bit);
 void spi_prettyprint_status_register_bp(uint8_t status, int bp);
+void spi_prettyprint_status_register_srwd(uint8_t status);
 void spi_prettyprint_status_register_welwip(uint8_t status);
 int spi_prettyprint_status_register(struct flashctx *flash);
 int spi_disable_blockprotect(struct flashctx *flash);
diff --git a/spi25.c b/spi25.c
index 58a5a79..a65f548 100644
--- a/spi25.c
+++ b/spi25.c
@@ -315,7 +315,13 @@
 	return readarr[0];
 }
 
-/* Prettyprint the status register. Common definitions. */
+/* Common highest bit: Status Register Write Disable (SRWD). */
+void spi_prettyprint_status_register_srwd(uint8_t status)
+{
+	msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n",
+		 (status & (1 << 7)) ? "" : "not ");
+}
+
 void spi_prettyprint_status_register_welwip(uint8_t status)
 {
 	msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
@@ -366,10 +372,8 @@
  */
 void spi_prettyprint_status_register_st_m25p(uint8_t status)
 {
-	msg_cdbg("Chip status register: Status Register Write Disable "
-		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 is "
-		     "%sset\n", (status & (1 << 6)) ? "" : "not ");
+	spi_prettyprint_status_register_srwd(status);
+	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_common(status);
 }