diff --git a/spi25.c b/spi25.c
index 58a5a79..a65f548 100644
--- a/spi25.c
+++ b/spi25.c
@@ -315,7 +315,13 @@
 	return readarr[0];
 }
 
-/* Prettyprint the status register. Common definitions. */
+/* Common highest bit: Status Register Write Disable (SRWD). */
+void spi_prettyprint_status_register_srwd(uint8_t status)
+{
+	msg_cdbg("Chip status register: Status Register Write Disable (SRWD) is %sset\n",
+		 (status & (1 << 7)) ? "" : "not ");
+}
+
 void spi_prettyprint_status_register_welwip(uint8_t status)
 {
 	msg_cdbg("Chip status register: Write Enable Latch (WEL) is "
@@ -366,10 +372,8 @@
  */
 void spi_prettyprint_status_register_st_m25p(uint8_t status)
 {
-	msg_cdbg("Chip status register: Status Register Write Disable "
-		     "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
-	msg_cdbg("Chip status register: Bit 6 is "
-		     "%sset\n", (status & (1 << 6)) ? "" : "not ");
+	spi_prettyprint_status_register_srwd(status);
+	spi_prettyprint_status_register_bit(status, 6);
 	spi_prettyprint_status_register_common(status);
 }