)]}'
{
  "commit": "55f6564524189f99097b3c6525b1b339a72cd063",
  "tree": "640e378ca1287a26f1a91ff4c0f088a84a7fa6bf",
  "parents": [
    "0ad11992be40c7e1e9b8a1f45a48a3e5362f6f7c"
  ],
  "author": {
    "name": "Edward O\u0027Callaghan",
    "email": "quasisec@google.com",
    "time": "Mon Nov 02 14:43:10 2020 +1100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jan 05 16:07:04 2023 +0000"
  },
  "message": "chipset_enable.c: Add Intel pch7 did\u003d0x1e4{1,2,3} support\n\nModified to be pch7 over pch6 as per-coreboot and review\ncomments.\n\nChange-Id: Ic69dc024e9af0c43d6b3a8213a5dc5d2f898c447\nSigned-off-by: Edward O\u0027Callaghan \u003cquasisec@google.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/47090\nOriginal-Reviewed-by: Sam McNally \u003csammc@google.com\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71329\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "458569fa9b4f6a424c82410454583b727e2c30e9",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "25d31bf1fa3930e55fd35821473dc3bc44c7226b",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}